[Intel-xe] [PATCH v2 10/11] drm/xe: Remove dependency on intel_mchbar_regs.h
Rodrigo Vivi
rodrigo.vivi at intel.com
Fri Feb 17 20:18:05 UTC 2023
On Thu, Feb 16, 2023 at 04:52:25PM -0800, Lucas De Marchi wrote:
> The only thing really needed is the base offset, MCHBAR_MIRROR_BASE_SNB.
> Remove the include and just define it inplace.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_pc.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 3465236b0b49..cc7d1007d942 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -20,12 +20,12 @@
> #include "xe_mmio.h"
> #include "xe_pcode.h"
>
> -#include "intel_mchbar_regs.h"
> +#define MCHBAR_MIRROR_BASE_SNB 0x140000
>
> -/* For GEN6_RP_STATE_CAP.reg to be merged when the definition moves to Xe */
> -#define RP0_MASK REG_GENMASK(7, 0)
> -#define RP1_MASK REG_GENMASK(15, 8)
> -#define RPN_MASK REG_GENMASK(23, 16)
> +#define GEN6_RP_STATE_CAP _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5998)
> +#define RP0_MASK REG_GENMASK(7, 0)
> +#define RP1_MASK REG_GENMASK(15, 8)
> +#define RPN_MASK REG_GENMASK(23, 16)
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>
> #define GEN10_FREQ_INFO_REC _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5ef0)
> #define RPE_MASK REG_GENMASK(15, 8)
> --
> 2.39.0
>
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