[Intel-xe] [PATCH v4 05/12] drm/xe: Remove dependency on intel_lrc_reg.h

[Matt Roper]

On Fri, Feb 24, 2023 at 04:15:41PM -0800, Lucas De Marchi wrote:
> Create regs/xe_lrc_layout.h file with all the offsets used by the xe
> driver. Eventually the xe driver may use a different way to define them
> since it doesn't supported below gen12.
> 
> v2: Rename file to intel_lrc_layout.h since it's not really about
>     registers (Matt Roper)
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 17 +++++++++++++++++
>  drivers/gpu/drm/xe/xe_execlist.c        |  2 +-
>  drivers/gpu/drm/xe/xe_guc_submit.c      |  3 +--
>  drivers/gpu/drm/xe/xe_lrc.c             |  2 +-
>  drivers/gpu/drm/xe/xe_ring_ops.c        |  2 +-
>  5 files changed, 21 insertions(+), 5 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> new file mode 100644
> index 000000000000..4be81abc86ad
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef _XE_LRC_LAYOUT_H_
> +#define _XE_LRC_LAYOUT_H_
> +
> +#define CTX_CONTEXT_CONTROL		(0x02 + 1)
> +#define CTX_RING_HEAD			(0x04 + 1)
> +#define CTX_RING_TAIL			(0x06 + 1)
> +#define CTX_RING_START			(0x08 + 1)
> +#define CTX_RING_CTL			(0x0a + 1)
> +#define CTX_PDP0_UDW			(0x30 + 1)
> +#define CTX_PDP0_LDW			(0x32 + 1)
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
> index 8a7e0d86fed9..ba9f72694277 100644
> --- a/drivers/gpu/drm/xe/xe_execlist.c
> +++ b/drivers/gpu/drm/xe/xe_execlist.c
> @@ -9,6 +9,7 @@
>  
>  #include "regs/xe_engine_regs.h"
>  #include "regs/xe_gt_regs.h"
> +#include "regs/xe_lrc_layout.h"
>  #include "xe_bo.h"
>  #include "xe_device.h"
>  #include "xe_engine.h"
> @@ -22,7 +23,6 @@
>  #include "xe_sched_job.h"
>  
>  #include "gt/intel_gpu_commands.h"
> -#include "gt/intel_lrc_reg.h"
>  #include "i915_reg.h"
>  
>  #define XE_EXECLIST_HANG_LIMIT 1
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index aca41ecedf7d..5eb11d56e9da 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -13,6 +13,7 @@
>  
>  #include <drm/drm_managed.h>
>  
> +#include "regs/xe_lrc_layout.h"
>  #include "xe_device.h"
>  #include "xe_engine.h"
>  #include "xe_force_wake.h"
> @@ -31,8 +32,6 @@
>  #include "xe_trace.h"
>  #include "xe_vm.h"
>  
> -#include "gt/intel_lrc_reg.h"
> -
>  static struct xe_gt *
>  guc_to_gt(struct xe_guc *guc)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index bf12f71fbe72..5baa3cf53852 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -7,6 +7,7 @@
>  
>  #include "regs/xe_engine_regs.h"
>  #include "regs/xe_gt_regs.h"
> +#include "regs/xe_lrc_layout.h"
>  #include "xe_bo.h"
>  #include "xe_device.h"
>  #include "xe_engine_types.h"
> @@ -16,7 +17,6 @@
>  #include "xe_vm.h"
>  
>  #include "gt/intel_gpu_commands.h"
> -#include "gt/intel_lrc_reg.h"
>  #include "i915_reg.h"
>  
>  #define GEN8_CTX_VALID				(1 << 0)
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index 61f22bcec82c..276fc9691986 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -6,6 +6,7 @@
>  #include "xe_ring_ops.h"
>  
>  #include "regs/xe_gt_regs.h"
> +#include "regs/xe_lrc_layout.h"
>  #include "xe_engine_types.h"
>  #include "xe_gt.h"
>  #include "xe_lrc.h"
> @@ -14,7 +15,6 @@
>  #include "xe_vm_types.h"
>  
>  #include "gt/intel_gpu_commands.h"
> -#include "gt/intel_lrc_reg.h"
>  #include "i915_reg.h"
>  
>  static u32 preparser_disable(bool state)
> -- 
> 2.39.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation