[Intel-xe] ✗ CI.checkpatch: warning for Try to handle TLB invalidations from CT fast-path (rev2)
Patchwork
patchwork at emeril.freedesktop.org
Wed Jul 5 16:11:04 UTC 2023
== Series Details ==
Series: Try to handle TLB invalidations from CT fast-path (rev2)
URL : https://patchwork.freedesktop.org/series/120174/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c7d32770e3cd31d9fc134ce41f329b10aa33ee15
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 4f5eb6be6e710571740101a01282285fcbb5209d
Author: Matthew Auld <matthew.auld at intel.com>
Date: Wed Jul 5 17:06:10 2023 +0100
drm/xe: handle TLB invalidations from CT fast-path
In various test cases that put the system under a heavy load, we can
sometimes see errors with missed TLB invalidations. In such cases we see
the interrupt arrive for the invalidation from the GuC, however the
actual processing of the completion is pushed onto a workqueue and
handled with all the other CT stuff, which might take longer than
expected. Since we expect TLB invalidations to complete within a
reasonable amount of time (at most ~250ms), and they do seem pretty
critical, allow handling directly from the CT fast-path.
v2 (José):
- Actually use the correct spinlock/unlock_irq, since pending_lock is
grabbed from IRQ.
v3:
- Don't publish the TLB fence on the list until after we fully
initialize it and successfully do the CT send. The list is now only
protected by the spin_lock pending_lock and we can't hold that
across the entire TLB send operation.
References: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/297
References: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/320
References: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/449
Signed-off-by: Matthew Auld <matthew.auld at intel.com>
Cc: Matthew Brost <matthew.brost at intel.com>
Cc: José Roberto de Souza <jose.souza at intel.com>
+ /mt/dim checkpatch a7d60b4c1cc05bf8be394d35f262e8cd34588fb5 drm-intel
20b433650 drm/xe: hold mem_access.ref for CT fast-path
d9e9621c9 drm/xe/ct: hold fast_lock when reserving space for g2h
d30c7506c drm/xe/tlb: increment next seqno after successful CT send
a77414ae3 drm/xe/ct: serialise fast_lock during CT disable
2789af258 drm/xe/gt: tweak placement for signalling TLB fences after GT reset
8f378b6d5 drm/xe/tlb: also update seqno_recv during reset
-:45: WARNING:MEMORY_BARRIER: memory barrier without comment
#45: FILE: drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c:109:
+ smp_wmb();
total: 0 errors, 1 warnings, 0 checks, 27 lines checked
4f5eb6be6 drm/xe: handle TLB invalidations from CT fast-path
-:27: WARNING:COMMIT_LOG_USE_LINK: Unknown link reference 'References:', use 'Link:' or 'Closes:' instead
#27:
References: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/297
-:28: WARNING:COMMIT_LOG_USE_LINK: Unknown link reference 'References:', use 'Link:' or 'Closes:' instead
#28:
References: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/320
-:29: WARNING:COMMIT_LOG_USE_LINK: Unknown link reference 'References:', use 'Link:' or 'Closes:' instead
#29:
References: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/449
total: 0 errors, 3 warnings, 0 checks, 197 lines checked
More information about the Intel-xe
mailing list