[Intel-xe] ✓ CI.checkpatch: success for drm/xe/pvc: Force even num engines to use 64B (rev2)

[Patchwork]

== Series Details ==

Series: drm/xe/pvc: Force even num engines to use 64B (rev2)
URL   : https://patchwork.freedesktop.org/series/119817/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c7d32770e3cd31d9fc134ce41f329b10aa33ee15
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a6300782e36de87cf82d906d9107663595e4d50e
Author: Niranjana Vishwanathapura <niranjana.vishwanathapura at intel.com>
Date:   Mon Jul 10 14:49:03 2023 -0700

    drm/xe/pvc: Force even num engines to use 64B
    
    Wa_16017236439 requires that we update BCS_SWCTRL
    (via indirect context batch buffer) to set 64B
    transfers when running on an even-numbered BCS
    engine and 256B on an odd-numbered BCS engine.
    
    Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
    Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura at intel.com>
+ /mt/dim checkpatch d39e49e2ad386bf59f585a05ab659563e0472314 drm-intel
a6300782e drm/xe/pvc: Force even num engines to use 64B