[Intel-xe] [PATCH 2/2] drm/xe/pvc: Use fast copy engines as migrate engine on PVC

[Matthew Brost]

On Thu, Jul 20, 2023 at 01:10:38AM -0700, Niranjana Vishwanathapura wrote:
> Some copy hardware engine instances are faster than others on PVC.
> Use a virtual engine of these plus the reserved instance for the migrate
> engine on PVC. The idea being if a fast instance is available it will be
> used and the throughput of kernel copies, clears, and pagefault
> servicing will be higher.
> 
> Signed-off-by: Matthew Brost <matthew.brost at intel.com>

Reviewed-by: Matthew Brost <matthew.brost at intel.com>

> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_hw_engine.c | 31 +++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_hw_engine.h |  1 +
>  drivers/gpu/drm/xe/xe_migrate.c   |  7 ++++---
>  3 files changed, 36 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 1af5cccd1142..8738888283b7 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -773,3 +773,34 @@ bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe)
>  	return xe->info.supports_usm && hwe->class == XE_ENGINE_CLASS_COPY &&
>  		hwe->instance == gt->usm.reserved_bcs_instance;
>  }
> +
> +/**
> + * xe_hw_engine_migrate_logical_mask - Return logical mask for migrate engine.
> + * @gt: gt instance
> + *
> + * On PVC, due to workaround 16017236439, odd instance hardware copy engines
> + * are faster than even instance ones.
> + * This function returns the mask involving all faster copy engines and the
> + * reserved copy engine to be used as logical mask for migrate engine.
> + * Including the reserved copy engine is required to avoid deadlocks due to
> + * migrate jobs servicing the faults gets stuck behind the job that faulted.
> + */
> +u32 xe_hw_engine_migrate_logical_mask(struct xe_gt *gt)
> +{
> +	struct xe_device *xe = gt_to_xe(gt);
> +	u32 logical_mask = 0;
> +	struct xe_hw_engine *hwe;
> +	enum xe_hw_engine_id id;
> +
> +	/* Only support this function on PVC for now */
> +	if (XE_WARN_ON(xe->info.platform != XE_PVC))
> +		return 0;
> +
> +	for_each_hw_engine(hwe, gt, id) {
> +		if (hwe->class == XE_ENGINE_CLASS_COPY &&
> +		    (hwe->instance & 1 || xe_gt_is_usm_hwe(gt, hwe)))
> +			logical_mask |= BIT(hwe->logical_instance);
> +	}
> +
> +	return logical_mask;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
> index 7eca9d53c7b1..8eb70958073e 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.h
> @@ -16,6 +16,7 @@ void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec);
>  void xe_hw_engine_enable_ring(struct xe_hw_engine *hwe);
>  u32 xe_hw_engine_mask_per_class(struct xe_gt *gt,
>  				enum xe_engine_class engine_class);
> +u32 xe_hw_engine_migrate_logical_mask(struct xe_gt *gt);
>  
>  struct xe_hw_engine_snapshot *
>  xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe);
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 4c6f299fd024..2dc3e4266dee 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -344,11 +344,12 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile)
>  							   XE_ENGINE_CLASS_COPY,
>  							   primary_gt->usm.reserved_bcs_instance,
>  							   false);
> -		if (!hwe)
> +		u32 logical_mask = xe_hw_engine_migrate_logical_mask(gt);
> +
> +		if (!hwe || !logical_mask)
>  			return ERR_PTR(-EINVAL);
>  
> -		m->eng = xe_engine_create(xe, vm,
> -					  BIT(hwe->logical_instance), 1,
> +		m->eng = xe_engine_create(xe, vm, logical_mask, 1,
>  					  hwe, ENGINE_FLAG_KERNEL);
>  	} else {
>  		m->eng = xe_engine_create_class(xe, primary_gt, vm,
> -- 
> 2.21.0.rc0.32.g243a4c7e27
>