[Intel-xe] [PATCH 1/2] drm/xe: Set AE PTE bit if enabled on smem

[Lucas De Marchi]

On Fri, Jul 21, 2023 at 06:41:57PM +0200, Nirmoy Das wrote:
>Hi Lucas,
>
>On 7/21/2023 6:14 PM, Lucas De Marchi wrote:
>>On Fri, Jul 21, 2023 at 04:07:44PM +0200, Nirmoy Das wrote:
>>>Set AE PTE bit on smem if the platform is supported and
>>>enabled device scoped atomics on system memory by a
>>>user with madvise ioctl.
>>>
>>>Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
>>>---
>>>drivers/gpu/drm/xe/xe_pt.c | 4 ++++
>>>1 file changed, 4 insertions(+)
>>>
>>>diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
>>>index 457f1363ec67..d43c91cf4776 100644
>>>--- a/drivers/gpu/drm/xe/xe_pt.c
>>>+++ b/drivers/gpu/drm/xe/xe_pt.c
>>>@@ -774,6 +774,10 @@ xe_pt_stage_bind(struct xe_tile *tile, struct 
>>>xe_vma *vma,
>>>        xe_walk.dma_offset = vram_region_gpu_offset(bo->ttm.resource);
>>>        xe_walk.cache = XE_CACHE_WB;
>>>    } else {
>>>+        if (tile_to_xe(tile)->info.platform != XE_PVC &&
>>
>>why the platform check?
>
>
>PVC doesn't support atomics on smem. Should I move the check in the 
>madvise ioctl instead ?

yes, I think so. See below

>
>Regards,
>
>Nirmoy
>
>>
>>Lucas De Marchi
>>
>>>+            (vma && vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT))

this check should suffice without adding each and every platform
throughout the code. When we can't do a generic check, then we should
add helper functions like has_xyz() to abstract what we are checking.

Lucas De Marchi

>>>+            xe_walk.default_pte |= XE_USM_PPGTT_PTE_AE;
>>>+
>>>        if (!xe_vma_has_no_bo(vma) && bo->flags & XE_BO_SCANOUT_BIT)
>>>            xe_walk.cache = XE_CACHE_WT;
>>>        else
>>>-- 
>>>2.39.0
>>>