[Intel-xe] ✓ CI.checkpatch: success for drm/xe: Invert mask and val in xe_mmio_wait32.

[Patchwork]

== Series Details ==

Series: drm/xe: Invert mask and val in xe_mmio_wait32.
URL   : https://patchwork.freedesktop.org/series/121388/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c7d32770e3cd31d9fc134ce41f329b10aa33ee15
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f4c48cb23e3a6bc772b87be71c0de745f2a49e81
Author: Rodrigo Vivi <rodrigo.vivi at intel.com>
Date:   Wed Jul 26 17:03:52 2023 -0400

    drm/xe: Invert mask and val in xe_mmio_wait32.
    
    The order: 'offset, mask, val'; is more common in other
    drivers and in special in i915, where any dev could copy
    a sequence and end up with unexpected behavior.
    
    Done with coccinelle:
    @rule1@
    expression gt, reg, val, mask, timeout, out, atomic;
    @@
    - xe_mmio_wait32(gt, reg, val, mask, timeout, out, atomic)
    + xe_mmio_wait32(gt, reg, mask, val, timeout, out, atomic)
    
    spatch -sp_file mmio.cocci *.c *.h compat-i915-headers/intel_uncore.h \
           --in-place
    
    Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
    Reviewed-by: Matthew Brost <matthew.brost at intel.com>
+ /mt/dim checkpatch 6dc7ee6d03e78d12f132a503fa47428fb2d4bb41 drm-intel
f4c48cb23 drm/xe: Invert mask and val in xe_mmio_wait32.