[Intel-xe] [PATCH] drm/xe: Fix ROW_CHICKEN2 define

Matt Roper matthew.d.roper at intel.com
Mon Mar 6 17:09:52 UTC 2023


On Mon, Mar 06, 2023 at 08:57:57AM -0800, Lucas De Marchi wrote:
> When this register was added in xe for some workarounds, it was copied
> from i915 before the registers got changed to add the MCR annotation.
> The register 0xe4f4 is MCR since gen8, long before any GPU supported by
> the xe driver. Replace all occurrences with the right register.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +-
>  drivers/gpu/drm/xe/xe_wa.c           | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 4d0f09cd447c..3ba2b2978dd9 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -231,7 +231,7 @@
>  #define   THREAD_EX_ARB_MODE			REG_GENMASK(3, 2)
>  #define   THREAD_EX_ARB_MODE_RR_AFTER_DEP	REG_FIELD_PREP(THREAD_EX_ARB_MODE, 0x2)
>  
> -#define GEN7_ROW_CHICKEN2			_MMIO(0xe4f4)
> +#define GEN8_ROW_CHICKEN2			MCR_REG(0xe4f4)
>  #define   GEN12_DISABLE_READ_SUPPRESSION	REG_BIT(15)
>  #define   GEN12_DISABLE_EARLY_READ		REG_BIT(14)
>  #define   GEN12_ENABLE_LARGE_GRF_MODE		REG_BIT(12)
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index df72b15dfeb0..5938e538ba7d 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -191,7 +191,7 @@ static const struct xe_rtp_entry engine_was[] = {
>  	},
>  	{ XE_RTP_NAME("1606931601"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1210), ENGINE_CLASS(RENDER)),
> -	  XE_RTP_ACTIONS(SET(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ,
> +	  XE_RTP_ACTIONS(SET(GEN8_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ,
>  			     XE_RTP_ACTION_FLAG(MASKED_REG)))
>  	},
>  	{ XE_RTP_NAME("22010931296, 18011464164, 14010919138"),
> @@ -213,7 +213,7 @@ static const struct xe_rtp_entry engine_was[] = {
>  	  XE_RTP_RULES(GRAPHICS_VERSION(1200),
>  		       ENGINE_CLASS(RENDER),
>  		       IS_INTEGRATED),
> -	  XE_RTP_ACTIONS(SET(GEN7_ROW_CHICKEN2, GEN12_PUSH_CONST_DEREF_HOLD_DIS,
> +	  XE_RTP_ACTIONS(SET(GEN8_ROW_CHICKEN2, GEN12_PUSH_CONST_DEREF_HOLD_DIS,
>  			     XE_RTP_ACTION_FLAG(MASKED_REG)))
>  	},
>  	{ XE_RTP_NAME("14010229206, 1409085225"),
> -- 
> 2.39.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation


More information about the Intel-xe mailing list