[Intel-xe] ✓ CI.Patch_applied: success for DG2 + PVC workarounds and infra

[Patchwork]

== Series Details ==

Series: DG2 + PVC workarounds and infra
URL   : https://patchwork.freedesktop.org/series/114754/
State : success

== Summary ==

.git/rebase-apply/patch:260: trailing whitespace.
			     /* 
.git/rebase-apply/patch:271: trailing whitespace.
			     /* 
warning: 2 lines add whitespace errors.
Applying: drm/xe/mcr: Add L3BANK steering for DG2
Applying: drm/xe: Allow const propagation in gt_to_xe()
Applying: drm/xe: Constify xe_dss_mask_group_ffs()
Applying: drm/xe: Add helper to get dss per group
Applying: drm/xe/rtp: Move match function from wa to rtp
Applying: drm/xe/rtp: Add match for render reset domain
Applying: drm/xe/rtp: Add match helper for gslice fused off
Applying: drm/xe: Remove dump function from reg_sr
Applying: drm/xe: Name LRC wa after the engine it belongs
Applying: drm/xe/debugfs: Dump register save-restore tables
Applying: drm/xe/reg_sr: Tweak verbosity for register printing
Applying: drm/xe/pvc: Remove A* steppings
Applying: drm/xe: Reorder WAs to consider the platform
Applying: drm/xe: Add PVC gt workarounds
Applying: drm/xe: Add PVC engine workarounds
Applying: drm/xe: Add missing DG2 gt workarounds and tunings
Applying: drm/xe: Add missing DG2 engine workarounds
Applying: drm/xe: Add missing DG2 lrc tunings
Applying: drm/xe: Add missing DG2 lrc workarounds