[Intel-xe] [PATCH] drm/xe: Use BO's GT to determine dma_offset when programming PTEs

[Thomas Hellström]

Hi.

Good catch. Some comments below.

On 3/23/23 09:15, Matthew Brost wrote:
> Rather than using the passed in GT, use the BO's GT determine dma_offset
> when programming PTEs as these two GT's could differ (i.e. mapping a BO
> from a remote GT). The BO's GT is correct GT to use as this where BO
> resides, while the passed in GT is where the mapping is created.
>
> Signed-off-by: Matthew Brost <matthew.brost at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_bo.c | 5 +++++
>   drivers/gpu/drm/xe/xe_bo.h | 1 +
>   drivers/gpu/drm/xe/xe_pt.c | 4 +++-
>   3 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 764b3ca9fff7..8beb35aa6f15 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -79,6 +79,11 @@ mem_type_to_gt(struct xe_device *xe, u32 mem_type)
>   	return xe_device_get_gt(xe, mem_type == XE_PL_STOLEN ? 0 : (mem_type - XE_PL_VRAM0));
>   }
>   
> +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo)

Kerneldoc.

> +{
XE_WARN_ON_ONCE(!vram) ?
> +	return mem_type_to_gt(xe_bo_device(bo), bo->ttm.resource->mem_type);
> +}
> +
>   static void try_add_system(struct xe_bo *bo, struct ttm_place *places,
>   			   u32 bo_flags, u32 *c)
>   {
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index f4303810f213..f9abd8036417 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -105,6 +105,7 @@ struct xe_bo *xe_bo_create_from_data(struct xe_device *xe, struct xe_gt *gt,
>   
>   int xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
>   			      u32 bo_flags);
Newline.
> +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo);
>   
>   static inline struct xe_bo *ttm_to_xe_bo(const struct ttm_buffer_object *bo)
>   {
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index a2e586ebd9a8..6dc31b030687 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -792,10 +792,12 @@ xe_pt_stage_bind(struct xe_gt *gt, struct xe_vma *vma,
>   	int ret;
>   
>   	if (is_vram) {
> +		struct xe_gt *bo_gt = xe_bo_to_gt(bo);
> +
>   		xe_walk.default_pte = GEN12_PPGTT_PTE_LM;
>   		if (vma && vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT)
>   			xe_walk.default_pte |= GEN12_USM_PPGTT_PTE_AE;
> -		xe_walk.dma_offset = gt->mem.vram.io_start -
> +		xe_walk.dma_offset = bo_gt->mem.vram.io_start -
>   			gt_to_xe(gt)->mem.vram.io_start;
>   		xe_walk.cache = XE_CACHE_WB;
>   	} else {

Thanks,

Thomas