[Intel-xe] [PATCH v2] drm/xe: Use BO's GT to determine dma_offset when programming PTEs

[Matthew Brost]

On Thu, Mar 23, 2023 at 05:35:45PM +0100, Thomas Hellström wrote:
> 
> On 3/23/23 17:27, Matthew Brost wrote:
> > Rather than using the passed in GT, use the BO's GT determine dma_offset
> > when programming PTEs as these two GT's could differ (i.e. mapping a BO
> > from a remote GT). The BO's GT is correct GT to use as this where BO
> > resides, while the passed in GT is where the mapping is created.
> > 
> > v2:
> >    (Thomas)      - Kernel doc, extra new line
> >    (CI)          - Rebase to tip
> > 
> > Signed-off-by: Matthew Brost <matthew.brost at intel.com>
> > ---
> >   drivers/gpu/drm/xe/xe_bo.c | 13 +++++++++++++
> >   drivers/gpu/drm/xe/xe_bo.h |  2 ++
> >   drivers/gpu/drm/xe/xe_pt.c |  4 +++-
> >   3 files changed, 18 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> > index ab9cd9286f77..3ccc59a372aa 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.c
> > +++ b/drivers/gpu/drm/xe/xe_bo.c
> > @@ -79,6 +79,19 @@ mem_type_to_gt(struct xe_device *xe, u32 mem_type)
> >   	return xe_device_get_gt(xe, mem_type == XE_PL_STOLEN ? 0 : (mem_type - XE_PL_VRAM0));
> >   }
> > +/**
> > + * xe_bo_to_gt - Get a GT from a BO's memory location
> 
> Nit: Should have brackets: xe_bo_to_gt()
> 

Yea, will fix before pushing.

> Reviewed-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
>

Thanks for the review, will push once CI comes back.

Matt

> 
> > + * @bo: The buffer object
> > + *
> > + * Get a GT from a BO's memory location, should be called on BOs in VRAM only.
> > + *
> > + * Return: xe_gt object which is closest to the BO
> > + */
> > +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo)
> > +{
> > +	return mem_type_to_gt(xe_bo_device(bo), bo->ttm.resource->mem_type);
> > +}
> > +
> >   static void try_add_system(struct xe_bo *bo, struct ttm_place *places,
> >   			   u32 bo_flags, u32 *c)
> >   {
> > diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> > index f841e74cd417..486703815949 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.h
> > +++ b/drivers/gpu/drm/xe/xe_bo.h
> > @@ -105,6 +105,8 @@ struct xe_bo *xe_bo_create_from_data(struct xe_device *xe, struct xe_gt *gt,
> >   int xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
> >   			      u32 bo_flags);
> > +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo);
> > +
> >   static inline struct xe_bo *ttm_to_xe_bo(const struct ttm_buffer_object *bo)
> >   {
> >   	return container_of(bo, struct xe_bo, ttm);
> > diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> > index dfd97b0ec42a..6b2943efcdbc 100644
> > --- a/drivers/gpu/drm/xe/xe_pt.c
> > +++ b/drivers/gpu/drm/xe/xe_pt.c
> > @@ -759,10 +759,12 @@ xe_pt_stage_bind(struct xe_gt *gt, struct xe_vma *vma,
> >   	int ret;
> >   	if (is_vram) {
> > +		struct xe_gt *bo_gt = xe_bo_to_gt(bo);
> > +
> >   		xe_walk.default_pte = GEN12_PPGTT_PTE_LM;
> >   		if (vma && vma->use_atomic_access_pte_bit)
> >   			xe_walk.default_pte |= GEN12_USM_PPGTT_PTE_AE;
> > -		xe_walk.dma_offset = gt->mem.vram.io_start -
> > +		xe_walk.dma_offset = bo_gt->mem.vram.io_start -
> >   			gt_to_xe(gt)->mem.vram.io_start;
> >   		xe_walk.cache = XE_CACHE_WB;
> >   	} else {