[Intel-xe] [PATCH 0/6] PAT fixes

[Matt Roper]

The page attribute table code had a few issues that needed to be
corrected:

 - PAT registers are MCR on some platforms (or even a mix of unicast and
   MCR on MTL).  We need to ensure that we're using the appropriate kind
   of programming for each platform/GT.

 - MTL extends the number of entries in the PAT table, but there's a
   jump in the register offsets in the middle; although we don't program
   any of the entries in the top half of the table [yet], we should
   update the register definition macros to accomodate this in case we
   do need to start programming those entries in the future.

 - MTL's PAT tables were set incorrectly.  1W coherency should only be
   used on certain entries.

Some general cleanup and refactoring is also provided in this series to
keep the code clean and easier to understand.

Note that this series only addresses the programming of the PAT_INDEX
registers, i.e., how we tell the hardware the behavior that should be
associated with PAT index.  Selecting and encoding an appropriate PAT
index into the PTEs is not handled by this series (and still needs
general updates for the Xe driver).


Matt Roper (6):
  drm/xe/pat: Move PAT setup to a dedicated file
  drm/xe/pat: Use table-based programming of PAT settings
  drm/xe/pat: Handle unicast vs MCR PAT registers
  drm/xe/pat: Clean up PAT register definitions
  drm/xe/mtl: Fix PAT table coherency settings
  drm/xe/mtl: Handle PAT_INDEX offset jump

 drivers/gpu/drm/xe/Makefile          |  1 +
 drivers/gpu/drm/xe/regs/xe_gt_regs.h |  1 -
 drivers/gpu/drm/xe/xe_gt.c           | 82 +----------------------
 drivers/gpu/drm/xe/xe_pat.c          | 98 ++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_pat.h          | 13 ++++
 5 files changed, 115 insertions(+), 80 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pat.c
 create mode 100644 drivers/gpu/drm/xe/xe_pat.h

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2.39.2