[Intel-xe] [PATCH] drm/xe: Load HuC on Alderlake P

[Lucas De Marchi]

On Sat, May 13, 2023 at 02:52:30AM +0000, Anusha Srivatsa wrote:
>Thanks for the patch.
>
>Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>

applied, thanks

Lucas De Marchi

>
>
>> -----Original Message-----
>> From: De Marchi, Lucas <lucas.demarchi at intel.com>
>> Sent: Friday, May 12, 2023 4:37 PM
>> To: intel-xe at lists.freedesktop.org
>> Cc: Srivatsa, Anusha <anusha.srivatsa at intel.com>; De Marchi, Lucas
>> <lucas.demarchi at intel.com>
>> Subject: [PATCH] drm/xe: Load HuC on Alderlake P
>>
>> Alderlake P uses TGL HuC and it was not added together with ADL-S, because it
>> was failing for unrelated reasons. Now that those are fixed, allow it to load HuC.
>>
>> 	# cat /sys/kernel/debug/dri/0/gt0/uc/huc_info
>> 	HuC firmware: i915/tgl_huc.bin
>> 		status: RUNNING
>> 		version: wanted 0.0, found 7.9
>> 		uCode: 589504 bytes
>> 		RSA: 256 bytes
>>
>> 	HuC status: 0x00090001
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_uc_fw.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
>> index 305e7f8992ea..317c541753fb 100644
>> --- a/drivers/gpu/drm/xe/xe_uc_fw.c
>> +++ b/drivers/gpu/drm/xe/xe_uc_fw.c
>> @@ -111,6 +111,7 @@ struct fw_blobs_by_type {
>>  	fw_def(TIGERLAKE,	major_ver(i915,	guc,	tgl,	70, 5))
>>
>>  #define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver)
>> 		\
>> +	fw_def(ALDERLAKE_P,	no_ver(i915,	huc,	tgl))
>> 	\
>>  	fw_def(ALDERLAKE_S,	no_ver(i915,	huc,	tgl))
>> 	\
>>  	fw_def(DG1,		no_ver(i915,	huc,	dg1))
>> 	\
>>  	fw_def(ROCKETLAKE,	no_ver(i915,	huc,	tgl))
>> 	\
>> --
>> 2.40.1
>