[Intel-xe] [PATCH 2/2] drm/xe: Fix check for platform without geometry pipeline

[Matt Roper]

On Tue, May 23, 2023 at 03:50:20PM +0200, Michał Winiarski wrote:
> From: Michał Winiarski <michal.winiarski at intel.com>
> 
> It's not possible for the condition checking if we're running on
> platform without geometry pipeline to ever be true, since
> gt->fuse_topo.g_dss_mask is an array.
> 
> It also breaks the build:
> ../drivers/gpu/drm/xe/xe_rtp.c:183:50: error: address of array 'gt->fuse_topo.g_dss_mask' will always evaluate to 'true' [-Werror,-Wpointer-bool-conversion]
> 
> Signed-off-by: Michał Winiarski <michal.winiarski at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/xe_gt_topology.c | 5 +++++
>  drivers/gpu/drm/xe/xe_gt_topology.h | 2 ++
>  drivers/gpu/drm/xe/xe_rtp.c         | 2 +-
>  3 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_topology.c b/drivers/gpu/drm/xe/xe_gt_topology.c
> index 7c3e347e4d74..d4bbd0a835c2 100644
> --- a/drivers/gpu/drm/xe/xe_gt_topology.c
> +++ b/drivers/gpu/drm/xe/xe_gt_topology.c
> @@ -128,6 +128,11 @@ xe_dss_mask_group_ffs(const xe_dss_mask_t mask, int groupsize, int groupnum)
>  	return find_next_bit(mask, XE_MAX_DSS_FUSE_BITS, groupnum * groupsize);
>  }
>  
> +bool xe_dss_mask_empty(const xe_dss_mask_t mask)
> +{
> +	return bitmap_empty(mask, XE_MAX_DSS_FUSE_BITS);
> +}
> +
>  /**
>   * xe_gt_topology_has_dss_in_quadrant - check fusing of DSS in GT quadrant
>   * @gt: GT to check
> diff --git a/drivers/gpu/drm/xe/xe_gt_topology.h b/drivers/gpu/drm/xe/xe_gt_topology.h
> index 5f35deed9128..d1b54fb52ea6 100644
> --- a/drivers/gpu/drm/xe/xe_gt_topology.h
> +++ b/drivers/gpu/drm/xe/xe_gt_topology.h
> @@ -17,6 +17,8 @@ void xe_gt_topology_dump(struct xe_gt *gt, struct drm_printer *p);
>  unsigned int
>  xe_dss_mask_group_ffs(const xe_dss_mask_t mask, int groupsize, int groupnum);
>  
> +bool xe_dss_mask_empty(const xe_dss_mask_t mask);
> +
>  bool
>  xe_gt_topology_has_dss_in_quadrant(struct xe_gt *gt, int quad);
>  
> diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c
> index 86fd1025b931..86427edd3bfb 100644
> --- a/drivers/gpu/drm/xe/xe_rtp.c
> +++ b/drivers/gpu/drm/xe/xe_rtp.c
> @@ -180,7 +180,7 @@ bool xe_rtp_match_first_gslice_fused_off(const struct xe_gt *gt,
>  	unsigned int dss_per_gslice = 4;
>  	unsigned int dss;
>  
> -	if (drm_WARN(&gt_to_xe(gt)->drm, !gt->fuse_topo.g_dss_mask,
> +	if (drm_WARN(&gt_to_xe(gt)->drm, xe_dss_mask_empty(gt->fuse_topo.g_dss_mask),
>  		     "Checking gslice for platform without geometry pipeline\n"))
>  		return false;
>  
> -- 
> 2.40.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation