[Intel-xe] [PATCH] drm/xe/pvc: Don't try to invalidate AuxCCS TLB
Matt Roper
matthew.d.roper at intel.com
Wed May 24 19:26:35 UTC 2023
Generally !has_flatccs implies that a platform has AuxCCS compression
and thus needs to invalidate the AuxCCS TLB. However PVC is a special
case because it has no compression of either type (FlatCCS or AuxCCS)
so we should avoid writing to non-existent AuxCCS registers.
Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
---
drivers/gpu/drm/xe/xe_ring_ops.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 74c1b5dfbaee..d2fa0b4c8bcc 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -190,6 +190,18 @@ static void __emit_job_gen12_copy(struct xe_sched_job *job, struct xe_lrc *lrc,
xe_lrc_write_ring(lrc, dw, i * sizeof(*dw));
}
+static bool has_aux_ccs(struct xe_device *xe)
+{
+ /*
+ * PVC is a special case that has no compression of either type
+ * (FlatCCS or AuxCCS).
+ */
+ if (xe->info.platform == XE_PVC)
+ return false;
+
+ return !xe->info.has_flat_ccs;
+}
+
static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
u64 batch_addr, u32 seqno)
{
@@ -202,7 +214,7 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
dw[i++] = preparser_disable(true);
/* hsdes: 1809175790 */
- if (!xe->info.has_flat_ccs) {
+ if (has_aux_ccs(xe)) {
if (decode)
i = emit_aux_table_inv(gt, VD0_AUX_NV, dw, i);
else
@@ -248,7 +260,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
i = emit_pipe_invalidate(mask_flags, dw, i);
/* hsdes: 1809175790 */
- if (!xe->info.has_flat_ccs)
+ if (has_aux_ccs(xe))
i = emit_aux_table_inv(gt, GFX_CCS_AUX_NV, dw, i);
dw[i++] = preparser_disable(false);
--
2.40.1
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