[Intel-xe] [PATCH v2 08/30] fixup! drm/xe/display: Implement display support

Lucas De Marchi lucas.demarchi at intel.com
Thu May 25 23:30:44 UTC 2023


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

On Fri, May 19, 2023 at 04:18:05PM -0700, Matt Roper wrote:
>---
> drivers/gpu/drm/xe/display/xe_fb_pin.c        | 6 +++---
> drivers/gpu/drm/xe/display/xe_plane_initial.c | 5 +++--
> 2 files changed, 6 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>index c7c4df18e439..27e4d29aa73d 100644
>--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>@@ -123,7 +123,7 @@ static int __xe_pin_fb_vma_ggtt(struct intel_framebuffer *fb,
> {
> 	struct xe_bo *bo = intel_fb_obj(&fb->base);
> 	struct xe_device *xe = to_xe_device(fb->base.dev);
>-	struct xe_ggtt *ggtt = to_gt(xe)->mem.ggtt;
>+	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
> 	u32 align;
> 	int ret;
>
>@@ -173,7 +173,7 @@ static int __xe_pin_fb_vma_ggtt(struct intel_framebuffer *fb,
> 					   rot_info->plane[i].dst_stride);
> 	}
>
>-	xe_ggtt_invalidate(to_gt(xe));
>+	xe_ggtt_invalidate(ggtt);
>
> out:
> 	mutex_unlock(&ggtt->lock);
>@@ -238,7 +238,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> static void __xe_unpin_fb_vma(struct i915_vma *vma)
> {
> 	struct xe_device *xe = to_xe_device(vma->bo->ttm.base.dev);
>-	struct xe_ggtt *ggtt = to_gt(xe)->mem.ggtt;
>+	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
>
> 	if (vma->dpt)
> 		xe_bo_unpin_map_no_vm(vma->dpt);
>diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
>index 34ae461865a7..41540b27775c 100644
>--- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
>+++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
>@@ -52,6 +52,7 @@ initial_plane_bo(struct xe_device *xe,
> 		 struct intel_initial_plane_config *plane_config)
> {
> 	struct xe_gt *gt0 = xe_device_get_gt(xe, 0);
>+	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
> 	struct xe_bo *bo;
> 	resource_size_t phys_base;
> 	u32 base, size, flags;
>@@ -64,7 +65,7 @@ initial_plane_bo(struct xe_device *xe,
>
> 	base = round_down(plane_config->base, page_size);
> 	if (IS_DGFX(xe)) {
>-		u64 __iomem *gte = gt0->mem.ggtt->gsm;
>+		u64 __iomem *gte = tile0->mem.ggtt->gsm;
> 		u64 pte;
>
> 		gte += base / XE_PAGE_SIZE;
>@@ -115,7 +116,7 @@ initial_plane_bo(struct xe_device *xe,
> 			page_size);
> 	size -= base;
>
>-	bo = xe_bo_create_pin_map_at(xe, gt0, NULL, size, phys_base,
>+	bo = xe_bo_create_pin_map_at(xe, &tile0->primary_gt, NULL, size, phys_base,
> 				     ttm_bo_type_kernel, flags);
> 	if (IS_ERR(bo)) {
> 		drm_dbg(&xe->drm,
>-- 
>2.40.0
>


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