[Intel-xe] [PATCH] drm/xe: Sysfs entries to query fused min, max frequency of

[Sundaresan, Sujaritha]

Please ignore this patch. For some reason the complete series did not 
get sent.

Will send the updated one.

-Suja

On 5/30/2023 10:43 AM, Sujaritha Sundaresan wrote:
> Adding sysfs entries to get fused min, max frequency of lmem
> using the pcode mailbox interface.
>
> Co-developed-by: Badal Nilawar <badal.nilawar at intel.com>
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_guc_pc.c | 44 ++++++++++++++++++++++++++++++++++
>   1 file changed, 44 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index e799faa1c6b8..a38493bcadae 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -65,6 +65,10 @@
>    * - freq_rpn: The Render Performance (RP) N level, which is the minimal one.
>    * - freq_rpe: The Render Performance (RP) E level, which is the efficient one.
>    * - freq_rp0: The Render Performance (RP) 0 level, which is the maximum one.
> + * - freq_mem_rp0: The fused maximum frequency of LMEM using the PCODE mailbox
> + *		   interface.
> + * - freq_mem_rpn: The fused minimal frequency of LMEM using the PCODE mailbox
> + *		   interface.
>    *
>    * device/gt#/freq_* *read-write* files:
>    * - freq_min: GuC PC min request.
> @@ -625,6 +629,44 @@ static ssize_t rc6_residency_show(struct device *dev,
>   }
>   static DEVICE_ATTR_RO(rc6_residency);
>   
> +static ssize_t freq_mem_rp0_show(struct device *dev,
> +				 struct device_attribute *attr, char *buff)
> +{
> +	u32 val;
> +	int err;
> +
> +	err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> +			    PCODE_MBOX_FC_SC_READ_FUSED_P0,
> +			    PCODE_MBOX_DOMAIN_HBM, &val);
> +	if (err)
> +		return err;
> +
> +	/* data_out - Fused P0 for domain ID in units of 50 MHz */
> +	val *= GT_FREQUENCY_MULTIPLIER;
> +
> +	return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rp0);
> +
> +static ssize_t freq_mem_rpn_show(struct device *dev,
> +				 struct device_attribute *attr, char *buff)
> +{
> +	u32 val;
> +	int err;
> +
> +	err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> +			    PCODE_MBOX_FC_SC_READ_FUSED_PN,
> +			    PCODE_MBOX_DOMAIN_HBM, &val);
> +	if (err)
> +		return err;
> +
> +	/* data_out - Fused P0 for domain ID in units of 50 MHz */
> +	val *= GT_FREQUENCY_MULTIPLIER;
> +
> +	return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rpn);
> +
>   static const struct attribute *pc_attrs[] = {
>   	&dev_attr_freq_act.attr,
>   	&dev_attr_freq_cur.attr,
> @@ -635,6 +677,8 @@ static const struct attribute *pc_attrs[] = {
>   	&dev_attr_freq_max.attr,
>   	&dev_attr_rc_status.attr,
>   	&dev_attr_rc6_residency.attr,
> +	&dev_attr_freq_mem_rp0.attr,
> +	&dev_attr_freq_mem_rpn.attr,
>   	NULL
>   };
>