[Intel-xe] [PATCH v3 26/31] drm/xe: Invalidate TLB on all affected GTs during GGTT updates
Matt Roper
matthew.d.roper at intel.com
Tue May 30 21:15:44 UTC 2023
The GGTT is part of the tile and is shared by the primary and media GTs
on platforms with a standalone media architecture. However each of
these GTs has its own TLBs caching the page table lookups, and each
needs to be invalidated separately.
Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>
---
drivers/gpu/drm/xe/xe_ggtt.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index c4862c1cfd9b..9a3edead3948 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -190,13 +190,10 @@ int xe_ggtt_init(struct xe_ggtt *ggtt)
#define PVC_GUC_TLB_INV_DESC1 XE_REG(0xcf80)
#define PVC_GUC_TLB_INV_DESC1_INVALIDATE REG_BIT(6)
-void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
+static void ggtt_invalidate_gt_tlb(struct xe_gt *gt)
{
- /*
- * TODO: Loop over each GT in tile once media GT support is
- * re-added
- */
- struct xe_gt *gt = ggtt->tile->primary_gt;
+ if (!gt)
+ return;
/* TODO: vfunc for GuC vs. non-GuC */
@@ -221,6 +218,13 @@ void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
}
}
+void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
+{
+ /* Each GT in a tile has its own TLB to cache GGTT lookups */
+ ggtt_invalidate_gt_tlb(ggtt->tile->primary_gt);
+ ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
+}
+
void xe_ggtt_printk(struct xe_ggtt *ggtt, const char *prefix)
{
u64 addr, scratch_pte;
--
2.40.1
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