[Intel-xe] [PATCH v2 39/50] drm/xe/uapi: Refactor engine information
Francois Dugast
francois.dugast at intel.com
Fri Nov 3 14:34:45 UTC 2023
From: Rodrigo Vivi <rodrigo.vivi at intel.com>
First of all, let's add the tile and gt IDs to the engine_info.
We originally tried to abstract tile from the uAPI, but it is
not future proof since the tile might be important info to the
user space in regarding cache line information.
Now that we have gt_id as part of the info, let's convert
the instance.gt_id into a generic scheduling group id number.
For all the current platforms, the scheduling group is the
GT ID underneath, but at least the API becomes flexible enough
to allow different kind of engine grouping without necessarily
get so tied to the GT ID.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue.c | 17 +++++++++--------
drivers/gpu/drm/xe/xe_query.c | 13 ++++++++++---
drivers/gpu/drm/xe/xe_wait_user_fence.c | 4 ++--
include/uapi/drm/xe_drm.h | 12 ++++++++++--
4 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 849e463c4ed8..15fe709384e7 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -500,13 +500,13 @@ find_hw_engine(struct xe_device *xe,
if (eci.engine_class > ARRAY_SIZE(user_to_xe_engine_class))
return NULL;
- if (eci.gt_id >= xe->info.gt_count)
+ if (eci.sched_group_id >= xe->info.gt_count)
return NULL;
idx = array_index_nospec(eci.engine_class,
ARRAY_SIZE(user_to_xe_engine_class));
- return xe_gt_hw_engine(xe_device_get_gt(xe, eci.gt_id),
+ return xe_gt_hw_engine(xe_device_get_gt(xe, eci.sched_group_id),
user_to_xe_engine_class[idx],
eci.engine_instance, true);
}
@@ -547,7 +547,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
int len = num_bb_per_exec * num_dispositions;
int i, j, n;
u16 class;
- u16 gt_id;
+ u16 sched_group_id;
u32 return_mask = 0, prev_mask;
if (XE_IOCTL_DBG(xe, !xe_device_uc_enabled(xe) &&
@@ -569,12 +569,13 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
if (XE_IOCTL_DBG(xe, xe_hw_engine_is_reserved(hwe)))
return 0;
- if (XE_IOCTL_DBG(xe, n && eci[n].gt_id != gt_id) ||
+ if (XE_IOCTL_DBG(xe, n &&
+ eci[n].sched_group_id != sched_group_id) ||
XE_IOCTL_DBG(xe, n && eci[n].engine_class != class))
return 0;
class = eci[n].engine_class;
- gt_id = eci[n].gt_id;
+ sched_group_id = eci[n].sched_group_id;
if (num_bb_per_exec == 1 || !i)
return_mask |= BIT(eci[n].engine_instance);
@@ -623,7 +624,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, err))
return -EFAULT;
- if (XE_IOCTL_DBG(xe, eci[0].gt_id >= xe->info.gt_count))
+ if (XE_IOCTL_DBG(xe, eci[0].sched_group_id >= xe->info.gt_count))
return -EINVAL;
if (eci[0].engine_class >= DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC) {
@@ -636,7 +637,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
if (xe_gt_is_media_type(gt))
continue;
- eci[0].gt_id = gt->info.id;
+ eci[0].sched_group_id = gt->info.id;
logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
args->num_bb_per_exec,
args->num_dispositions);
@@ -677,7 +678,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
&q->multi_gt_link);
}
} else {
- gt = xe_device_get_gt(xe, eci[0].gt_id);
+ gt = xe_device_get_gt(xe, eci[0].sched_group_id);
logical_mask = calc_validate_logical_mask(xe, gt, eci,
args->num_bb_per_exec,
args->num_dispositions);
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 4ee002b76f21..e23c179c9cec 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -131,10 +131,10 @@ query_engine_cycles(struct xe_device *xe,
return -EINVAL;
eci = &resp.eci;
- if (eci->gt_id > XE_MAX_GT_PER_TILE)
+ if (eci->sched_group_id > XE_MAX_GT_PER_TILE)
return -EINVAL;
- gt = xe_device_get_gt(xe, eci->gt_id);
+ gt = xe_device_get_gt(xe, eci->sched_group_id);
if (!gt)
return -EINVAL;
@@ -215,8 +215,15 @@ static int query_engines(struct xe_device *xe,
xe_to_user_engine_class[hwe->class];
hw_engine_info[i].instance.engine_instance =
hwe->logical_instance;
- hw_engine_info[i].instance.gt_id = gt->info.id;
+ /*
+ * Scheduling Group ID is the global GT ID for the
+ * current hardware, although the API is flexible
+ */
+ hw_engine_info[i].instance.sched_group_id = gt->info.id;
hw_engine_info[i].instance.pad = 0;
+ hw_engine_info[i].tile_id = gt_to_tile(gt)->id;
+ hw_engine_info[i].gt_id = gt->info.id;
+
/*
* The mem_regions indexes in the mask below need to
* directly identify the struct
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index 4d5c2555ce41..dcbb1c578b22 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -68,10 +68,10 @@ static int check_hw_engines(struct xe_device *xe,
enum xe_engine_class user_class =
user_to_xe_engine_class[eci[i].engine_class];
- if (eci[i].gt_id >= xe->info.tile_count)
+ if (eci[i].sched_group_id >= xe->info.tile_count)
return -EINVAL;
- if (!xe_gt_hw_engine(xe_device_get_gt(xe, eci[i].gt_id),
+ if (!xe_gt_hw_engine(xe_device_get_gt(xe, eci[i].sched_group_id),
user_class, eci[i].engine_instance, true))
return -EINVAL;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index a6c70b8697c7..5b239c48f19d 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -211,8 +211,8 @@ struct drm_xe_engine_class_instance {
__u16 engine_class;
/** @engine_instance: Engine instance */
__u16 engine_instance;
- /** @gt_id: GT ID the instance is associated with */
- __u16 gt_id;
+ /** @sched_group_id: Scheduling Group ID for this engine instance */
+ __u16 sched_group_id;
/** @pad: MBZ */
__u16 pad;
};
@@ -228,6 +228,12 @@ struct drm_xe_query_engine_info {
/** @instance: The @drm_xe_engine_class_instance */
struct drm_xe_engine_class_instance instance;
+ /** @tile_id: Tile ID where this Engine lives */
+ __u16 tile_id;
+
+ /** @gt_id: GT ID where this Engine lives */
+ __u16 gt_id;
+
/**
* @near_mem_regions: Bit mask of instances from
* drm_xe_query_mem_regions that is near this engine.
@@ -1038,6 +1044,8 @@ struct drm_xe_exec_queue_create {
* @instances: user pointer to a 2-d array of struct
* drm_xe_engine_class_instance
*
+ * Every engine in the array needs to have the same @sched_group_id
+ *
* length = num_bb_per_exec (i) * num_dispositions (j)
* index = j + i * num_bb_per_exec
*/
--
2.34.1
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