[Intel-xe] [PATCH v3] drm/xe: clear the serviced bits on INTR_IDENTITY_REG

Jonathan Cavitt jonathan.cavitt at intel.com
Fri Nov 3 21:03:24 UTC 2023


The spec for this register, like many other interrupt related ones,
asks software to write back '1' to clear the serviced bits. Let's
respect the spec.

v2:
- Update commit message
- Add missing CC

v3: Rebase

Signed-off-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
CC: Daniele Spurio Ceraolo <daniele.ceraolospurio at intel.com>
CC: Lucas De Marchi <lucas.demarchi at intel.com>
CC: Rodrigo Vivi <rodrigo.vivi at intel.com>
CC: Paulo Zanoni <paulo.r.zanoni at intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
---
 drivers/gpu/drm/xe/xe_irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 61350ed32c61a..af3765c3fc0e2 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -232,7 +232,7 @@ gt_engine_identity(struct xe_device *xe,
 		return 0;
 	}
 
-	xe_mmio_write32(mmio, INTR_IDENTITY_REG(bank), INTR_DATA_VALID);
+	xe_mmio_write32(mmio, INTR_IDENTITY_REG(bank), ident);
 
 	return ident;
 }
-- 
2.25.1



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