[Intel-xe] [RFC 08/25] drm/xe: Add runalone engine property

[Mika Kuoppala]

From: Dominik Grzegorzek <dominik.grzegorzek at intel.com>

Introduce runalone engine param, which is used to ensure that only
one hw engine of group [rcs0, ccs0-3] is active on a tile. User
can set property only on engine create.

Note: unlike the i915, xe allows user to set runalone
also on devices with single render/compute engine. It should not
make much difference, but leave control to the user.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
---
 drivers/gpu/drm/xe/regs/xe_engine_regs.h |  1 +
 drivers/gpu/drm/xe/xe_exec_queue.c       | 21 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_lrc.c              |  8 ++++++++
 drivers/gpu/drm/xe/xe_lrc.h              |  3 +++
 include/uapi/drm/xe_drm.h                |  1 +
 5 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index 35dd4837dd75..662105137d38 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -72,6 +72,7 @@
 #define RING_EXECLIST_STATUS_HI(base)		XE_REG((base) + 0x234 + 4)
 
 #define RING_CONTEXT_CONTROL(base)		XE_REG((base) + 0x244)
+#define	  CTX_CTRL_RUN_ALONE			REG_BIT(7)
 #define	  CTX_CTRL_INHIBIT_SYN_CTX_SWITCH	REG_BIT(3)
 #define	  CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT	REG_BIT(0)
 
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 8e4ee13f098f..bc21026a6083 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -402,6 +402,26 @@ static int exec_queue_set_acc_granularity(struct xe_device *xe, struct xe_exec_q
 	return 0;
 }
 
+static int engine_set_runalone(struct xe_device *xe, struct xe_exec_queue *q,
+			       u64 value, bool create)
+{
+	int i;
+
+	if (XE_IOCTL_DBG(xe, !create))
+		return -EINVAL;
+
+	if (XE_IOCTL_DBG(xe, (q->class != XE_ENGINE_CLASS_RENDER &&
+			      q->class != XE_ENGINE_CLASS_COMPUTE)))
+		return -EINVAL;
+
+	if (value) {
+		for (i = 0; i < q->width; i++)
+			xe_lrc_set_runalone(q->lrc + i);
+	}
+
+	return 0;
+}
+
 typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
 					     struct xe_exec_queue *q,
 					     u64 value, bool create);
@@ -415,6 +435,7 @@ static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
 	[XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
 	[XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
 	[XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
+	[XE_EXEC_QUEUE_SET_PROPERTY_RUNALONE] = engine_set_runalone,
 };
 
 static int exec_queue_user_ext_set_property(struct xe_device *xe,
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index f8754f061599..1f373a794f53 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1273,3 +1273,11 @@ void xe_lrc_emit_hwe_state_instructions(struct xe_exec_queue *q, struct xe_bb *b
 		bb->len += num_dw;
 	}
 }
+	
+void xe_lrc_set_runalone(struct xe_lrc *lrc)
+{
+	u32 ctl;
+
+	ctl = _MASKED_BIT_ENABLE(CTX_CTRL_RUN_ALONE);
+	xe_lrc_write_ctx_reg(lrc, CTX_CONTEXT_CONTROL, ctl);
+}
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index 28b1d3f404d4..5932cf079014 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -55,4 +55,7 @@ void xe_lrc_dump_default(struct drm_printer *p,
 
 void xe_lrc_emit_hwe_state_instructions(struct xe_exec_queue *q, struct xe_bb *bb);
 
+void xe_lrc_set_runalone(struct xe_lrc *lrc);
+
+
 #endif
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 9bd7092a7ea4..4ecdceb7a074 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -765,6 +765,7 @@ struct drm_xe_exec_queue_set_property {
 #define XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER		5
 #define XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY		6
 #define XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY	7
+#define XE_EXEC_QUEUE_SET_PROPERTY_RUNALONE		8
 	/** @property: property to set */
 	__u32 property;
 
-- 
2.34.1