[Intel-xe] [PATCH v2 18/27] drm/xe: Adjust tile mask in operations create

[Matthew Brost]

This way the operations, not just created VMA, will have the correct
tile mask.

Signed-off-by: Matthew Brost <matthew.brost at intel.com>
---
 drivers/gpu/drm/xe/xe_vm.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index c2bca468a2d0..071424a9d283 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -882,8 +882,6 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm,
 				    u8 tile_mask)
 {
 	struct xe_vma *vma;
-	struct xe_tile *tile;
-	u8 id;
 
 	xe_assert(vm->xe, start < end);
 	xe_assert(vm->xe, end < vm->size);
@@ -910,13 +908,7 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm,
 		vma->gpuva.flags |= XE_VMA_READ_ONLY;
 	if (is_null)
 		vma->gpuva.flags |= DRM_GPUVA_SPARSE;
-
-	if (tile_mask) {
-		vma->tile_mask = tile_mask;
-	} else {
-		for_each_tile(tile, vm->xe, id)
-			vma->tile_mask |= 0x1 << id;
-	}
+	vma->tile_mask = tile_mask;
 
 	if (GRAPHICS_VER(vm->xe) >= 20 || vm->xe->info.platform == XE_PVC)
 		vma->gpuva.flags |= XE_VMA_ATOMIC_PTE_BIT;
@@ -2163,6 +2155,19 @@ static void print_op(struct xe_device *xe, struct drm_gpuva_op *op)
 }
 #endif
 
+static u8 adj_tile_mask(struct xe_device *xe, u8 tile_mask)
+{
+	struct xe_tile *tile;
+	u8 id;
+
+	if (!tile_mask) {
+		for_each_tile(tile, xe, id)
+			tile_mask |= 0x1 << id;
+	}
+
+	return tile_mask;
+}
+
 /*
  * Create operations list from IOCTL arguments, setup operations fields so parse
  * and commit steps are decoupled from IOCTL arguments. This step can fail.
@@ -2185,6 +2190,8 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
 	       operation, (ULL)addr, (ULL)range,
 	       (ULL)bo_offset_or_userptr);
 
+	tile_mask = adj_tile_mask(vm->xe, tile_mask);
+
 	switch (operation) {
 	case XE_VM_BIND_OP_MAP:
 	case XE_VM_BIND_OP_MAP_USERPTR:
-- 
2.34.1