[Intel-xe] [PATCH] drm/xe/rtp: Fix displayed whitelisted register range

[Ashutosh Dixit]

Fix displayed whitelisted register range. For example, with:

	XE_RTP_ACTIONS(WHITELIST(0xdafc, RING_FORCE_TO_NONPRIV_RANGE_4))

Before we would show:
	xe REG[0xdaf0-0xdaff]: allow read access

With this patch we show:
	xe REG[0xdafc-0xdb0b]: allow read access

Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 22 ++++++----------------
 1 file changed, 6 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index e66ae1bdaf9c0..4bc07bbdd7e8e 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -88,26 +88,16 @@ void xe_reg_whitelist_print_entry(struct drm_printer *p, unsigned int indent,
 {
 	u32 val = entry->set_bits;
 	const char *access_str = "(invalid)";
-	unsigned int range_bit = 2;
-	u32 range_start, range_end;
+	u32 range_start, range_end, range_bits;
+	u32 range[] = { 1, 4, 16, 64 };
 	bool deny;
 
 	deny = val & RING_FORCE_TO_NONPRIV_DENY;
+	BUILD_BUG_ON(ARRAY_SIZE(range) - 1 != RING_FORCE_TO_NONPRIV_RANGE_MASK);
+	range_bits = val & RING_FORCE_TO_NONPRIV_RANGE_MASK;
 
-	switch (val & RING_FORCE_TO_NONPRIV_RANGE_MASK) {
-	case RING_FORCE_TO_NONPRIV_RANGE_4:
-		range_bit = 4;
-		break;
-	case RING_FORCE_TO_NONPRIV_RANGE_16:
-		range_bit = 6;
-		break;
-	case RING_FORCE_TO_NONPRIV_RANGE_64:
-		range_bit = 8;
-		break;
-	}
-
-	range_start = reg & REG_GENMASK(25, range_bit);
-	range_end = range_start | REG_GENMASK(range_bit, 0);
+	range_start = reg & RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+	range_end = range_start + range[range_bits] * 4 - 1;
 
 	switch (val & RING_FORCE_TO_NONPRIV_ACCESS_MASK) {
 	case RING_FORCE_TO_NONPRIV_ACCESS_RW:
-- 
2.41.0