[Intel-xe] [PATCH v3 33/43] drm/xe/uapi: Convert tile_mask to a pt_placement_hint

[Rodrigo Vivi]

On Thu, Nov 09, 2023 at 09:29:49AM +0000, Matthew Brost wrote:
> On Thu, Nov 09, 2023 at 03:44:47PM +0000, Francois Dugast wrote:
> > From: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > 
> > The previous tile_mask was also an optional hint, and only used
> > for the page-table tree placement. However, it was so tied
> > with the tile concept itself. Let's clarify things up and make
> > this generic enough. So accept any valid memory region mask.
> > It could even be a direct near_mem_region gotten from the engine_info.
> > pt stands for page table.
> > 
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Signed-off-by: Francois Dugast <francois.dugast at intel.com>
> 
> I thought we landed on converting tile_mask to sched_group_mask?

my bad. I had forgotten or misunderstood that...

> I do
> not like pt_placement_hint at all as I've statede what we actually care
> about is creating mappings for exec queues. The sched_group_mask is
> still a hint basically saying at minimum you must create a mapping for
> these sched groups perhaps more. The driver is free to place a PPGTT (or
> multiple) anywhere it wants to based on the platform.

or I might have changed when documenting it since on the documentation
it was a lot about the placement of the PPGTT that was what this was
doing and I confused myself.

I believe with your text here as doc the sched_group_mask makes more sense.
Let's change.

> 
> e.g. On PVC we have two scheduling groups, and two PPGTT (one per tile in VRAM)
> e.g. On MTL we have two scheduling groups, and one PPGTT (sysmem)