[Intel-xe] ✓ CI.checkpatch: success for series starting with [1/4] drm/xe/guc: Fix wrong assert about full_len

Patchwork patchwork at emeril.freedesktop.org
Wed Nov 15 12:34:28 UTC 2023


== Series Details ==

Series: series starting with [1/4] drm/xe/guc: Fix wrong assert about full_len
URL   : https://patchwork.freedesktop.org/series/126458/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 2fcca3efcd99e90120ba04ba8e1145b2a0d5f9fa
Author: Michal Wajdeczko <michal.wajdeczko at intel.com>
Date:   Wed Nov 15 12:37:48 2023 +0100

    drm/xe/guc: Use valid scratch register for posting read
    
    There are only 4 scratch registers VF_SW_FLAG(0..3) on each GuC.
    We shouldn't use non-existing register VF_SW_FLAG(4) for posting
    read.
    
    Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
+ /mt/dim checkpatch 14d1d786caacdb3438d07ab86fabf2e36c8151cc drm-intel
03f757525 drm/xe/guc: Fix wrong assert about full_len
9cc8a0b12 drm/xe/guc: Copy response data from proper registers
f4f11457c drm/xe/guc: Fix handling of GUC_HXG_TYPE_NO_RESPONSE_BUSY
2fcca3efc drm/xe/guc: Use valid scratch register for posting read




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