[Intel-xe] [PATCH 2/3] drm/xe/pvc: Allow userspace to configure CCS mode
Niranjana Vishwanathapura
niranjana.vishwanathapura at intel.com
Thu Nov 16 03:34:35 UTC 2023
Allow user to configure the CCS mode setting through a
'ccs_mode' sysfs interface. Also report the current
CCS mode configuration and number of compute slices
available through this interface.
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura at intel.com>
---
drivers/gpu/drm/xe/xe_gt_sysfs.c | 53 ++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt_sysfs.c b/drivers/gpu/drm/xe/xe_gt_sysfs.c
index c69d2e8a0fe1..36f7bd34bc78 100644
--- a/drivers/gpu/drm/xe/xe_gt_sysfs.c
+++ b/drivers/gpu/drm/xe/xe_gt_sysfs.c
@@ -10,7 +10,11 @@
#include <drm/drm_managed.h>
+#include "regs/xe_gt_regs.h"
#include "xe_gt.h"
+#include "xe_gt_ccs_mode.h"
+#include "xe_gt_printk.h"
+#include "xe_mmio.h"
static void xe_gt_sysfs_kobj_release(struct kobject *kobj)
{
@@ -29,6 +33,50 @@ static void gt_sysfs_fini(struct drm_device *drm, void *arg)
kobject_put(gt->sysfs);
}
+static ssize_t
+ccs_mode_show(struct device *kdev,
+ struct device_attribute *attr, char *buf)
+{
+ struct xe_gt *gt = kobj_to_gt(&kdev->kobj);
+
+ return sysfs_emit(buf, "Enabled compute engines %d; Number of compute slices %d\n",
+ gt->ccs_mode.num_engines, hweight32(CCS_MASK(gt)));
+}
+
+static ssize_t
+ccs_mode_store(struct device *kdev, struct device_attribute *attr,
+ const char *buff, size_t count)
+{
+ struct xe_gt *gt = kobj_to_gt(&kdev->kobj);
+ u32 num_engines, num_slices;
+ int ret;
+
+ ret = kstrtou32(buff, 0, &num_engines);
+ if (ret)
+ return ret;
+
+ /*
+ * Ensure number of engines specified is valid and there is an
+ * exact multiple of engines for slices.
+ */
+ num_slices = hweight32(CCS_MASK(gt));
+ if (!num_engines || num_engines > num_slices || num_slices % num_engines) {
+ xe_gt_dbg(gt, "Invalid compute config, %d engines %d slices\n",
+ num_engines, num_slices);
+ return -EINVAL;
+ }
+
+ if (gt->ccs_mode.num_engines != num_engines) {
+ xe_gt_info(gt, "Setting compute mode to %d\n", num_engines);
+ gt->ccs_mode.num_engines = num_engines;
+ xe_gt_reset_async(gt);
+ }
+
+ return count;
+}
+
+static DEVICE_ATTR_RW(ccs_mode);
+
void xe_gt_sysfs_init(struct xe_gt *gt)
{
struct xe_tile *tile = gt_to_tile(gt);
@@ -52,6 +100,11 @@ void xe_gt_sysfs_init(struct xe_gt *gt)
gt->sysfs = &kg->base;
+ if (GRAPHICS_VERx100(xe) == 1260 &&
+ sysfs_create_file(gt->sysfs, &dev_attr_ccs_mode.attr))
+ drm_warn(&xe->drm,
+ "Sysfs creation for ccs_mode setting failed\n");
+
err = drmm_add_action_or_reset(&xe->drm, gt_sysfs_fini, gt);
if (err) {
drm_warn(&xe->drm, "%s: drmm_add_action_or_reset failed, err: %d\n",
--
2.21.0.rc0.32.g243a4c7e27
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