[Intel-xe] [PATCH] drm/xe: Include RPL sub platform PCI ids to pciidlist

[José Roberto de Souza]

RPL-U and RPL-S were defined as a subplatform but those PCI ids were
not included in pciidlist so Xe KMD would never probe device with
those ids.

Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
---
 include/drm/xe_pciids.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h
index 68fbab161feb0..d1e54befd05f4 100644
--- a/include/drm/xe_pciids.h
+++ b/include/drm/xe_pciids.h
@@ -69,7 +69,8 @@
 	MACRO__(0x468A, ## __VA_ARGS__),	\
 	MACRO__(0x4690, ## __VA_ARGS__),	\
 	MACRO__(0x4692, ## __VA_ARGS__),	\
-	MACRO__(0x4693, ## __VA_ARGS__)
+	MACRO__(0x4693, ## __VA_ARGS__),	\
+	XE_RPLS_IDS(MACRO__, ## __VA_ARGS__)
 
 /* ADL-P */
 #define XE_ADLP_IDS(MACRO__, ...)		\
@@ -119,7 +120,8 @@
 #define XE_RPLP_IDS(MACRO__, ...)		\
 	MACRO__(0xA720, ## __VA_ARGS__),	\
 	MACRO__(0xA7A0, ## __VA_ARGS__),	\
-	MACRO__(0xA7A8, ## __VA_ARGS__)
+	MACRO__(0xA7A8, ## __VA_ARGS__),	\
+	XE_RPLU_IDS(MACRO__, ## __VA_ARGS__)
 
 /* DG2 */
 #define XE_DG2_G10_IDS(MACRO__, ...)		\
-- 
2.42.1