[Intel-xe] [RFC 4/4] drm/xe: Add vram frequency sysfs attributes

[Rodrigo Vivi]

On Thu, Nov 16, 2023 at 08:00:43PM +0530, Sujaritha Sundaresan wrote:
> Add vram rp0/n frequency sysfs attribuites under
> /device/../tile<n>/memory/freq/vram_rp0/n_freq


The ideal scenario is that our xe_freq is generic enough to be used
under gt, tile or vram/memory...

> 
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_pcode_api.h  |  8 ++++
>  drivers/gpu/drm/xe/xe_tile_sysfs.c | 77 ++++++++++++++++++++++++++++--
>  2 files changed, 81 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index 5935cfe30204..c003a423562c 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -42,6 +42,14 @@
>  #define	    POWER_SETUP_I1_SHIFT		6	/* 10.6 fixed point format */
>  #define	    POWER_SETUP_I1_DATA_MASK		REG_GENMASK(15, 0)
>  
> +#define   XEHP_PCODE_FREQUENCY_CONFIG			0x6e	/* xehp, pvc */
> +/* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
> +#define     PCODE_MBOX_FC_SC_READ_FUSED_P0		0x0
> +#define     PCODE_MBOX_FC_SC_READ_FUSED_PN		0x1
> +/* PCODE_MBOX_DOMAIN_* - mailbox domain IDs */
> +/* XEHP_PCODE_FREQUENCY_CONFIG param2 */
> +#define     PCODE_MBOX_DOMAIN_HBM			0x2
> +
>  struct pcode_err_decode {
>  	int errno;
>  	const char *str;
> diff --git a/drivers/gpu/drm/xe/xe_tile_sysfs.c b/drivers/gpu/drm/xe/xe_tile_sysfs.c
> index d61c6fb1df40..2a6a515f48e8 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sysfs.c
> +++ b/drivers/gpu/drm/xe/xe_tile_sysfs.c
> @@ -7,9 +7,15 @@
>  #include <linux/sysfs.h>
>  #include <drm/drm_managed.h>
>  
> +#include "xe_gt.h"
> +#include "xe_gt_sysfs.h"
> +#include "xe_pcode.h"
> +#include "xe_pcode_api.h"
>  #include "xe_tile.h"
>  #include "xe_tile_sysfs.h"
>  
> +#define GT_FREQUENCY_MULTIPLIER	50
> +
>  static void xe_tile_sysfs_kobj_release(struct kobject *kobj)
>  {
>  	kfree(kobj);
> @@ -34,6 +40,58 @@ static DEVICE_ATTR_RO(physical_vram_size_bytes);
>  static const struct attribute *physical_memsize_attr =
>  	&dev_attr_physical_vram_size_bytes.attr;
>  
> +static ssize_t vram_rp0_freq_show(struct device *dev, struct device_attribute *attr,
> +				  char *buff)
> +{
> +	struct kobject *kobj = &dev->kobj;
> +	struct xe_gt *gt = kobj_to_gt(kobj);
> +	u32 val, mbox;
> +	int err;
> +
> +	mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, XEHP_PCODE_FREQUENCY_CONFIG)
> +		| REG_FIELD_PREP(PCODE_MB_PARAM1, PCODE_MBOX_FC_SC_READ_FUSED_P0)
> +		| REG_FIELD_PREP(PCODE_MB_PARAM2, PCODE_MBOX_DOMAIN_HBM);
> +
> +	err = xe_pcode_read(gt, mbox, &val, NULL);
> +	if (err)
> +		return err;
> +
> +	/* data_out - Fused P0 for domain ID in units of 50 MHz */
> +	val *= GT_FREQUENCY_MULTIPLIER;
> +
> +	return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(vram_rp0_freq);
> +
> +static ssize_t vram_rpn_freq_show(struct device *dev, struct device_attribute *attr,
> +				  char *buff)
> +{
> +	struct kobject *kobj = &dev->kobj;
> +	struct xe_gt *gt = kobj_to_gt(kobj);
> +	u32 val, mbox;
> +	int err;
> +
> +	mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, XEHP_PCODE_FREQUENCY_CONFIG)
> +		| REG_FIELD_PREP(PCODE_MB_PARAM1, PCODE_MBOX_FC_SC_READ_FUSED_PN)
> +		| REG_FIELD_PREP(PCODE_MB_PARAM2, PCODE_MBOX_DOMAIN_HBM);
> +
> +	err = xe_pcode_read(gt, mbox, &val, NULL);
> +	if (err)
> +		return err;
> +
> +	/* data_out - Fused Pn for domain ID in units of 50 MHz */
> +	val *= GT_FREQUENCY_MULTIPLIER;
> +
> +	return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(vram_rpn_freq);
> +
> +static const struct attribute *vram_freq_attrs[] = {
> +	&dev_attr_vram_rp0_freq.attr,
> +	&dev_attr_vram_rpn_freq.attr,
> +	NULL
> +};
> +
>  static void tile_sysfs_fini(struct drm_device *drm, void *arg)
>  {
>  	struct xe_tile *tile = arg;
> @@ -46,7 +104,8 @@ void xe_tile_sysfs_init(struct xe_tile *tile)
>  	struct xe_device *xe = tile_to_xe(tile);
>  	struct device *dev = xe->drm.dev;
>  	struct kobj_tile *kt;
> -	struct kobject *kobj;
> +	struct kobject *kobj1, *kobj2;
> +
>  	int err;
>  
>  	kt = kzalloc(sizeof(*kt), GFP_KERNEL);
> @@ -65,17 +124,27 @@ void xe_tile_sysfs_init(struct xe_tile *tile)
>  
>  	tile->sysfs = &kt->base;
>  
> -	kobj = kobject_create_and_add("memory", tile->sysfs);
> -	if (!kobj) {
> +	kobj1 = kobject_create_and_add("memory", tile->sysfs);
> +	if (!kobj1) {
>  		drm_warn(&xe->drm, "%s failed, err: %d\n", __func__, -ENOMEM);
>  		return;
>  	}
>  
>  	if (IS_DGFX(xe) && xe->info.platform != XE_DG1 &&
> -	    sysfs_create_file(kobj, physical_memsize_attr))
> +	    sysfs_create_file(kobj1, physical_memsize_attr))
>  		drm_warn(&xe->drm,
>  			 "Sysfs creation to read addr_range per tile failed\n");
>  
> +	kobj2 = kobject_create_and_add("freq", kobj1);
> +	if (xe->info.platform == XE_PVC) {
> +	err = sysfs_create_files(kobj2, vram_freq_attrs);
> +		if (err) {
> +			kobject_put(&kt->base);
> +			drm_warn(&xe->drm, "failed to register vram freq sysfs, err: %d\n", err);
> +			return;
> +		}
> +	}
> +
>  	err = drmm_add_action_or_reset(&xe->drm, tile_sysfs_fini, tile);
>  	if (err) {
>  		drm_warn(&xe->drm, "%s: drmm_add_action_or_reset failed, err: %d\n",
> -- 
> 2.25.1
>