[Intel-xe] [RFC v2 4/6] drm/xe/xe2: Updates on XY_CTRL_SURF_COPY_BLT
Ghimiray, Himal Prasad
himal.prasad.ghimiray at intel.com
Mon Nov 27 03:21:29 UTC 2023
On 24-11-2023 16:41, Thomas Hellström wrote:
> On Tue, 2023-11-21 at 15:39 +0530, Himal Prasad Ghimiray wrote:
>> - The XY_CTRL_SURF_COPY_BLT instruction operationg on ccs data
>> expects
>> size in pages of main memory for which CCS data should be copied.
>> - The bitfield representing copy size in XY_CTRL_SURF_COPY_BLT has
>> shifted one bit higher in the instruction.
>>
>> Cc: Thomas Hellström <thomas.hellstrom at linux.intel.com>
>> Signed-off-by: Himal Prasad Ghimiray
>> <himal.prasad.ghimiray at intel.com>
>> ---
>> drivers/gpu/drm/xe/regs/xe_gpu_commands.h | 1 +
>> drivers/gpu/drm/xe/xe_migrate.c | 23 +++++++++++++++++----
>> --
>> 2 files changed, 18 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
>> b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
>> index 7f74592f99ce..47459841aa69 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
>> @@ -13,6 +13,7 @@
>> #define DST_ACCESS_TYPE_SHIFT 20
>> #define CCS_SIZE_MASK 0x3FF
>> #define CCS_SIZE_SHIFT 8
>> +#define XE2_CCS_SIZE_SHIFT 9
>> #define XY_CTRL_SURF_MOCS_MASK GENMASK(31, 26)
>> #define XE2_XY_CTRL_SURF_MOCS_INDEX_MASK GENMASK(31, 28)
>> #define NUM_CCS_BYTES_PER_BLOCK 256
>> diff --git a/drivers/gpu/drm/xe/xe_migrate.c
>> b/drivers/gpu/drm/xe/xe_migrate.c
>> index ed2f3f5109f3..06706fad67aa 100644
>> --- a/drivers/gpu/drm/xe/xe_migrate.c
>> +++ b/drivers/gpu/drm/xe/xe_migrate.c
>> @@ -523,21 +523,31 @@ static void emit_copy_ccs(struct xe_gt *gt,
>> struct xe_bb *bb,
>> struct xe_device *xe = gt_to_xe(gt);
>> u32 *cs = bb->cs + bb->len;
>> u32 num_ccs_blks;
>> + u32 num_ccs_pages;
>> + u32 ccs_copy_size;
>> u32 mocs;
>>
>> - num_ccs_blks = DIV_ROUND_UP(xe_device_ccs_bytes(gt_to_xe(gt),
>> size),
>> - NUM_CCS_BYTES_PER_BLOCK);
>> - xe_gt_assert(gt, num_ccs_blks <= NUM_CCS_BLKS_PER_XFER);
>> + if (GRAPHICS_VERx100(xe) >= 2000) {
>> + num_ccs_pages =
>> DIV_ROUND_UP(xe_device_ccs_bytes(gt_to_xe(gt), size),
>> + XE_PAGE_SIZE);
>> + xe_gt_assert(gt, num_ccs_pages <= 1024);
>>
>> - if (GRAPHICS_VERx100(xe) >= 2000)
>> + ccs_copy_size = ((num_ccs_pages - 1) & CCS_SIZE_MASK)
>> << XE2_CCS_SIZE_SHIFT;
>> mocs = FIELD_PREP(XE2_XY_CTRL_SURF_MOCS_INDEX_MASK,
>> gt->mocs.uc_index);
>> - else
>> +
>> + } else {
>> + num_ccs_blks =
>> DIV_ROUND_UP(xe_device_ccs_bytes(gt_to_xe(gt), size),
>> + NUM_CCS_BYTES_PER_BLOCK);
>> + xe_gt_assert(gt, num_ccs_blks <=
>> NUM_CCS_BLKS_PER_XFER);
>> +
>> + ccs_copy_size = ((num_ccs_blks - 1) & CCS_SIZE_MASK)
>> << CCS_SIZE_SHIFT;
>> mocs = FIELD_PREP(XY_CTRL_SURF_MOCS_MASK, gt-
>>> mocs.uc_index);
>> + }
>>
>> *cs++ = XY_CTRL_SURF_COPY_BLT |
>> (src_is_indirect ? 0x0 : 0x1) <<
>> SRC_ACCESS_TYPE_SHIFT |
>> (dst_is_indirect ? 0x0 : 0x1) <<
>> DST_ACCESS_TYPE_SHIFT |
>> - ((num_ccs_blks - 1) & CCS_SIZE_MASK) <<
>> CCS_SIZE_SHIFT;
>> + ccs_copy_size;
>> *cs++ = lower_32_bits(src_ofs);
>> *cs++ = upper_32_bits(src_ofs) | mocs;
>> *cs++ = lower_32_bits(dst_ofs);
>> @@ -992,6 +1002,7 @@ struct dma_fence *xe_migrate_clear(struct
>> xe_migrate *m,
>>
>> emit_clear(gt, bb, clear_L0_ofs, clear_L0,
>> XE_PAGE_SIZE,
>> clear_vram);
>> +
> Unrelated change. Please remove, Otherwise LGTM.
> Reviewed-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
Thanks for the review. Will remove unrelated change in next patch.
>
>
>> if (xe_device_has_flat_ccs(xe) && clear_vram) {
>> emit_copy_ccs(gt, bb, clear_L0_ofs, true,
>> m->cleared_vram_ofs, false,
>> clear_L0);
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