[Intel-xe] [PATCH 2/2] drm/xe: Sync MTL PCI IDs with i915

[Lucas De Marchi]

On Wed, Nov 22, 2023 at 10:32:54AM -0800, Matt Roper wrote:
>On Tue, Nov 21, 2023 at 11:52:09AM -0800, Lucas De Marchi wrote:
>> For Xe1 platforms, it's better to follow the way i915 adds the PCI IDs
>> to the header, so it's easier to catch up when there is an update. This
>> brings the same logic applied in commit 2e3c369f23a7 ("drm/i915/mtl:
>> Eliminate subplatforms") to the equivalent xe header.
>>
>> The end result of this header for Xe1 platforms is now in sync with i915
>> as of commit 5032c607e886 ("drm/i915: ATS-M device ID update"). This can
>> be seen by
>>
>> 	$ git show 5032c607e886:include/drm/i915_pciids.h > a.h
>> 	$ git diff --color-words  --no-index a.h include/drm/xe_pciids.h
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>
>Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

Both patches applied to drm-xe-next. Thanks for the review.

Lucas De Marchi