[Intel-xe] [PATCH 1/8] RFC drm/xe: Move user engine class mappings to header

[Matthew Brost]

On Mon, Nov 27, 2023 at 07:41:18PM +0530, Riana Tauro wrote:
> Move user engine class <-> hw engine class to header
> files so that it can be used by perf component.
> 
> No functional changes.
> 
> Cc: Matthew Brost <matthew.brost at intel.com>
> Signed-off-by: Riana Tauro <riana.tauro at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c      | 17 +++++------------
>  drivers/gpu/drm/xe/xe_hw_engine_types.h | 18 ++++++++++++++++++
>  drivers/gpu/drm/xe/xe_query.c           | 22 +++-------------------
>  3 files changed, 26 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 62d0237e724e..6f27b78666f6 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -482,31 +482,24 @@ static int exec_queue_user_extensions(struct xe_device *xe, struct xe_exec_queue
>  	return 0;
>  }
>  
> -static const enum xe_engine_class user_to_xe_engine_class[] = {
> -	[DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
> -	[DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
> -	[DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
> -	[DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
> -	[DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
> -};
> -
>  static struct xe_hw_engine *
>  find_hw_engine(struct xe_device *xe,
>  	       struct drm_xe_engine_class_instance eci)
>  {
>  	u32 idx;
>  
> -	if (eci.engine_class > ARRAY_SIZE(user_to_xe_engine_class))
> +	if (eci.engine_class > ARRAY_SIZE(xe_user_to_engine_class))
>  		return NULL;
>  
>  	if (eci.gt_id >= xe->info.gt_count)
>  		return NULL;
>  
>  	idx = array_index_nospec(eci.engine_class,
> -				 ARRAY_SIZE(user_to_xe_engine_class));
> +				 ARRAY_SIZE(xe_user_to_engine_class));
> +
>  
>  	return xe_gt_hw_engine(xe_device_get_gt(xe, eci.gt_id),
> -			       user_to_xe_engine_class[idx],
> +			       xe_user_to_engine_class[idx],
>  			       eci.engine_instance, true);
>  }
>  
> @@ -532,7 +525,7 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
>  			continue;
>  
>  		if (hwe->class ==
> -		    user_to_xe_engine_class[DRM_XE_ENGINE_CLASS_COPY])
> +		    xe_user_to_engine_class[DRM_XE_ENGINE_CLASS_COPY])
>  			logical_mask |= BIT(hwe->logical_instance);
>  	}
>  
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
> index 39908dec042a..8269f77c4ca2 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
> @@ -6,6 +6,8 @@
>  #ifndef _XE_HW_ENGINE_TYPES_H_
>  #define _XE_HW_ENGINE_TYPES_H_
>  
> +#include <drm/xe_drm.h>
> +
>  #include "xe_force_wake_types.h"
>  #include "xe_lrc_types.h"
>  #include "xe_reg_sr_types.h"
> @@ -58,6 +60,22 @@ enum xe_hw_engine_id {
>  	XE_NUM_HW_ENGINES,
>  };
>  
> +static const u16 xe_engine_to_user_class[] = {

s/xe_engine_to_user_class/xe_hwe_engine_to_user_class

> +	[XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
> +	[XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
> +	[XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
> +	[XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
> +	[XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
> +};
> +
> +static const enum xe_engine_class xe_user_to_engine_class[] = {

s/xe_user_to_engine_class/xe_user_to_hwe_engine_class

Otherwise LGTM.

Matt

> +	[DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
> +	[DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
> +	[DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
> +	[DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
> +	[DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
> +};
> +
>  /* FIXME: s/XE_HW_ENGINE_MAX_INSTANCE/XE_HW_ENGINE_MAX_COUNT */
>  #define XE_HW_ENGINE_MAX_INSTANCE	9
>  
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 61a7d92b7e88..caa98c6b5853 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -22,22 +22,6 @@
>  #include "xe_mmio.h"
>  #include "xe_ttm_vram_mgr.h"
>  
> -static const u16 xe_to_user_engine_class[] = {
> -	[XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
> -	[XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
> -	[XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
> -	[XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
> -	[XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
> -};
> -
> -static const enum xe_engine_class user_to_xe_engine_class[] = {
> -	[DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
> -	[DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
> -	[DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
> -	[DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
> -	[DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
> -};
> -
>  static size_t calc_hw_engine_info_size(struct xe_device *xe)
>  {
>  	struct xe_hw_engine *hwe;
> @@ -138,10 +122,10 @@ query_engine_cycles(struct xe_device *xe,
>  	if (!gt)
>  		return -EINVAL;
>  
> -	if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
> +	if (eci->engine_class >= ARRAY_SIZE(xe_user_to_engine_class))
>  		return -EINVAL;
>  
> -	hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
> +	hwe = xe_gt_hw_engine(gt, xe_user_to_engine_class[eci->engine_class],
>  			      eci->engine_instance, true);
>  	if (!hwe)
>  		return -EINVAL;
> @@ -212,7 +196,7 @@ static int query_engines(struct xe_device *xe,
>  				continue;
>  
>  			hw_engine_info[i].engine_class =
> -				xe_to_user_engine_class[hwe->class];
> +				xe_engine_to_user_class[hwe->class];
>  			hw_engine_info[i].engine_instance =
>  				hwe->logical_instance;
>  			hw_engine_info[i].gt_id = gt->info.id;
> -- 
> 2.40.0
>