[Intel-xe] [PATCH 1/3] drm/xe/guc: Drop ancient GuC CTB definitions

[Matthew Brost]

On Tue, Nov 28, 2023 at 09:32:01PM +0100, Michal Wajdeczko wrote:
> Those definitions were applicable for old GuC firmwares only.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>

Reviewed-by: Matthew Brost <matthew.brost at intel.com>

> ---
>  .../drm/xe/abi/guc_communication_ctb_abi.h    | 21 -------------------
>  1 file changed, 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h b/drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
> index 41244055cc0c..d34f91002789 100644
> --- a/drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
> @@ -165,25 +165,4 @@ static_assert(sizeof(struct guc_ct_buffer_desc) == 64);
>   * - **flags**, holds various bits to control message handling
>   */
>  
> -/*
> - * Definition of the command transport message header (DW0)
> - *
> - * bit[4..0]	message len (in dwords)
> - * bit[7..5]	reserved
> - * bit[8]	response (G2H only)
> - * bit[8]	write fence to desc (H2G only)
> - * bit[9]	write status to H2G buff (H2G only)
> - * bit[10]	send status back via G2H (H2G only)
> - * bit[15..11]	reserved
> - * bit[31..16]	action code
> - */
> -#define GUC_CT_MSG_LEN_SHIFT			0
> -#define GUC_CT_MSG_LEN_MASK			0x1F
> -#define GUC_CT_MSG_IS_RESPONSE			(1 << 8)
> -#define GUC_CT_MSG_WRITE_FENCE_TO_DESC		(1 << 8)
> -#define GUC_CT_MSG_WRITE_STATUS_TO_BUFF		(1 << 9)
> -#define GUC_CT_MSG_SEND_STATUS			(1 << 10)
> -#define GUC_CT_MSG_ACTION_SHIFT			16
> -#define GUC_CT_MSG_ACTION_MASK			0xFFFF
> -
>  #endif
> -- 
> 2.25.1
>