[Intel-xe] [PATCH v2 1/5] 20231129214509.1174116-1-michal.winiarski at intel.com
Lucas De Marchi
lucas.demarchi at intel.com
Wed Nov 29 23:28:03 UTC 2023
From: Michał Winiarski <michal.winiarski at intel.com>
Squash patch series as dependency:
drm/xe: Fix header guard warning
drm/xe: Skip calling drm_dev_put on probe error
drm/xe: Use managed pci_enable_device
drm/xe/irq: Don't call pci_free_irq_vectors
drm/xe: Move xe_set_dma_info outside of MMIO setup
drm/xe: Move xe_mmio_probe_tiles outside of MMIO setup
drm/xe: Split xe_info_init
drm/xe: Introduce xe_tile_init_early and use at earlier point in probe
drm/xe: Map the entire BAR0 and hold onto the initial mapping
drm/xe/device: Introduce xe_device_probe_early
drm/xe: Don't "peek" into GMD_ID
drm/xe: Move system memory management init to earlier point in probe
drm/xe: Move force_wake init to earlier point in probe
drm/xe: Reorder GGTT init to earlier point in probe
Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
drivers/gpu/drm/xe/tests/xe_pci.c | 1 +
drivers/gpu/drm/xe/xe_device.c | 72 ++++++++--
drivers/gpu/drm/xe/xe_device.h | 5 +
drivers/gpu/drm/xe/xe_ggtt.c | 20 ++-
drivers/gpu/drm/xe/xe_ggtt.h | 2 +-
drivers/gpu/drm/xe/xe_gt.c | 2 -
drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h | 2 +-
drivers/gpu/drm/xe/xe_irq.c | 5 +-
drivers/gpu/drm/xe/xe_mmio.c | 58 ++------
drivers/gpu/drm/xe/xe_mmio.h | 2 +
drivers/gpu/drm/xe/xe_pci.c | 129 +++++++++++-------
drivers/gpu/drm/xe/xe_tile.c | 36 ++++-
drivers/gpu/drm/xe/xe_tile.h | 2 +-
13 files changed, 209 insertions(+), 127 deletions(-)
diff --git a/drivers/gpu/drm/xe/tests/xe_pci.c b/drivers/gpu/drm/xe/tests/xe_pci.c
index 306ff8cb35cb..f2cdc9bb4612 100644
--- a/drivers/gpu/drm/xe/tests/xe_pci.c
+++ b/drivers/gpu/drm/xe/tests/xe_pci.c
@@ -143,6 +143,7 @@ int xe_pci_fake_device_init(struct xe_device *xe, enum xe_platform platform,
return -ENODEV;
done:
+ xe_info_init_early(xe, desc, subplatform_desc);
xe_info_init(xe, desc, subplatform_desc);
return 0;
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 54202623e255..65e9aa5e6c31 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -24,6 +24,7 @@
#include "xe_drv.h"
#include "xe_exec_queue.h"
#include "xe_exec.h"
+#include "xe_ggtt.h"
#include "xe_gt.h"
#include "xe_irq.h"
#include "xe_mmio.h"
@@ -215,11 +216,11 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
xe->drm.anon_inode->i_mapping,
xe->drm.vma_offset_manager, false, false);
if (WARN_ON(err))
- goto err_put;
+ goto err;
err = drmm_add_action_or_reset(&xe->drm, xe_device_destroy, NULL);
if (err)
- goto err_put;
+ goto err;
xe->info.devid = pdev->device;
xe->info.revid = pdev->revision;
@@ -258,18 +259,16 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
if (!xe->ordered_wq || !xe->unordered_wq) {
drm_err(&xe->drm, "Failed to allocate xe workqueues\n");
err = -ENOMEM;
- goto err_put;
+ goto err;
}
err = xe_display_create(xe);
if (WARN_ON(err))
- goto err_put;
+ goto err;
return xe;
-err_put:
- drm_dev_put(&xe->drm);
-
+err:
return ERR_PTR(err);
}
@@ -355,6 +354,46 @@ static void xe_device_sanitize(struct drm_device *drm, void *arg)
xe_gt_sanitize(gt);
}
+static int xe_set_dma_info(struct xe_device *xe)
+{
+ unsigned int mask_size = xe->info.dma_mask_size;
+ int err;
+
+ dma_set_max_seg_size(xe->drm.dev, xe_sg_segment_size(xe->drm.dev));
+
+ err = dma_set_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
+ if (err)
+ goto mask_err;
+
+ err = dma_set_coherent_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
+ if (err)
+ goto mask_err;
+
+ return 0;
+
+mask_err:
+ drm_err(&xe->drm, "Can't set DMA mask/consistent mask (%d)\n", err);
+ return err;
+}
+
+/*
+ * Initialize MMIO resources that don't require any knowledge about tile count.
+ */
+int xe_device_probe_early(struct xe_device *xe)
+{
+ int err;
+
+ err = xe_mmio_init(xe);
+ if (err)
+ return err;
+
+ err = xe_mmio_root_tile_init(xe);
+ if (err)
+ return err;
+
+ return 0;
+}
+
int xe_device_probe(struct xe_device *xe)
{
struct xe_tile *tile;
@@ -369,16 +408,23 @@ int xe_device_probe(struct xe_device *xe)
if (err)
return err;
+ err = xe_set_dma_info(xe);
+ if (err)
+ return err;
+
+ xe_mmio_probe_tiles(xe);
+
+ xe_ttm_sys_mgr_init(xe);
+
+ for_each_gt(gt, xe, id)
+ xe_force_wake_init_gt(gt, gt_to_fw(gt));
+
for_each_tile(tile, xe, id) {
- err = xe_tile_alloc(tile);
+ err = xe_ggtt_init_early(tile->mem.ggtt);
if (err)
return err;
}
- err = xe_mmio_init(xe);
- if (err)
- return err;
-
err = drmm_add_action_or_reset(&xe->drm, xe_driver_flr_fini, xe);
if (err)
return err;
@@ -407,8 +453,6 @@ int xe_device_probe(struct xe_device *xe)
if (err)
goto err_irq_shutdown;
- xe_ttm_sys_mgr_init(xe);
-
for_each_tile(tile, xe, id) {
err = xe_tile_init_noalloc(tile);
if (err)
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 54694f98c91a..3da83b233206 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -37,6 +37,7 @@ static inline struct xe_device *ttm_to_xe_device(struct ttm_device *ttm)
struct xe_device *xe_device_create(struct pci_dev *pdev,
const struct pci_device_id *ent);
+int xe_device_probe_early(struct xe_device *xe);
int xe_device_probe(struct xe_device *xe);
void xe_device_remove(struct xe_device *xe);
void xe_device_shutdown(struct xe_device *xe);
@@ -123,6 +124,10 @@ static inline bool xe_device_uc_enabled(struct xe_device *xe)
for ((id__) = 0; (id__) < (xe__)->info.tile_count; (id__)++) \
for_each_if((tile__) = &(xe__)->tiles[(id__)])
+#define for_each_remote_tile(tile__, xe__, id__) \
+ for ((id__) = 1; (id__) < (xe__)->info.tile_count; (id__)++) \
+ for_each_if((tile__) = &(xe__)->tiles[(id__)])
+
/*
* FIXME: This only works for now since multi-tile and standalone media
* happen to be mutually exclusive. Future platforms may change this...
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 0e2a41837f16..fab3cc04882d 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -96,14 +96,20 @@ static void xe_ggtt_clear(struct xe_ggtt *ggtt, u64 start, u64 size)
}
}
-static void ggtt_fini_noalloc(struct drm_device *drm, void *arg)
+static void ggtt_fini_early(struct drm_device *drm, void *arg)
{
struct xe_ggtt *ggtt = arg;
mutex_destroy(&ggtt->lock);
drm_mm_takedown(&ggtt->mm);
+}
+
+static void ggtt_fini(struct drm_device *drm, void *arg)
+{
+ struct xe_ggtt *ggtt = arg;
xe_bo_unpin_map_no_vm(ggtt->scratch);
+ ggtt->scratch = NULL;
}
static void primelockdep(struct xe_ggtt *ggtt)
@@ -124,7 +130,12 @@ static const struct xe_ggtt_pt_ops xelpg_pt_ops = {
.pte_encode_bo = xelpg_ggtt_pte_encode_bo,
};
-int xe_ggtt_init_noalloc(struct xe_ggtt *ggtt)
+/*
+ * Early GGTT initialization, which allows to create new mappings usable by the GuC.
+ * Mappings are not usable by the HW engines, as it doesn't have scratch / initial clear done to it
+ * yet. That will happen in the regular, non-early GGTT init.
+ */
+int xe_ggtt_init_early(struct xe_ggtt *ggtt)
{
struct xe_device *xe = tile_to_xe(ggtt->tile);
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
@@ -178,7 +189,7 @@ int xe_ggtt_init_noalloc(struct xe_ggtt *ggtt)
mutex_init(&ggtt->lock);
primelockdep(ggtt);
- return drmm_add_action_or_reset(&xe->drm, ggtt_fini_noalloc, ggtt);
+ return drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
}
static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
@@ -226,7 +237,8 @@ int xe_ggtt_init(struct xe_ggtt *ggtt)
xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0, ggtt->scratch->size);
xe_ggtt_initial_clear(ggtt);
- return 0;
+
+ return drmm_add_action_or_reset(&xe->drm, ggtt_fini, ggtt);
err:
ggtt->scratch = NULL;
return err;
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index 3faa3c6d0375..a09c166dff70 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -12,7 +12,7 @@ struct drm_printer;
void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte);
void xe_ggtt_invalidate(struct xe_ggtt *ggtt);
-int xe_ggtt_init_noalloc(struct xe_ggtt *ggtt);
+int xe_ggtt_init_early(struct xe_ggtt *ggtt);
int xe_ggtt_init(struct xe_ggtt *ggtt);
void xe_ggtt_printk(struct xe_ggtt *ggtt, const char *prefix);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 8a6fb9641cd6..4db94344bbde 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -293,8 +293,6 @@ int xe_gt_init_early(struct xe_gt *gt)
{
int err;
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
-
err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
if (err)
return err;
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h b/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h
index 60469fde4147..ec5ba673b314 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h
@@ -4,7 +4,7 @@
*/
#ifndef _XE_ENGINE_CLASS_SYSFS_H_
-#define _XE_ENGINE_CLASS_SYSFS_H__
+#define _XE_ENGINE_CLASS_SYSFS_H_
#include <linux/kobject.h>
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 25ba5167c1b9..d1f5ba4bb745 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -585,7 +585,6 @@ static void irq_uninstall(struct drm_device *drm, void *arg)
irq = pci_irq_vector(pdev, 0);
free_irq(irq, xe);
- pci_free_irq_vectors(pdev);
}
int xe_irq_install(struct xe_device *xe)
@@ -612,7 +611,7 @@ int xe_irq_install(struct xe_device *xe)
err = request_irq(irq, irq_handler, IRQF_SHARED, DRIVER_NAME, xe);
if (err < 0) {
drm_err(&xe->drm, "Failed to request MSI/MSIX IRQ %d\n", err);
- goto free_pci_irq_vectors;
+ return err;
}
xe->irq.enabled = true;
@@ -627,8 +626,6 @@ int xe_irq_install(struct xe_device *xe)
free_irq_handler:
free_irq(irq, xe);
-free_pci_irq_vectors:
- pci_free_irq_vectors(pdev);
return err;
}
diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 0f846272e39c..6148c9da4f64 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -15,38 +15,18 @@
#include "regs/xe_regs.h"
#include "xe_bo.h"
#include "xe_device.h"
+#include "xe_ggtt.h"
#include "xe_gt.h"
#include "xe_gt_mcr.h"
#include "xe_macros.h"
#include "xe_module.h"
+#include "xe_tile.h"
#define XEHP_MTCFG_ADDR XE_REG(0x101800)
#define TILE_COUNT REG_GENMASK(15, 8)
#define BAR_SIZE_SHIFT 20
-static int xe_set_dma_info(struct xe_device *xe)
-{
- unsigned int mask_size = xe->info.dma_mask_size;
- int err;
-
- dma_set_max_seg_size(xe->drm.dev, xe_sg_segment_size(xe->drm.dev));
-
- err = dma_set_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
- if (err)
- goto mask_err;
-
- err = dma_set_coherent_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
- if (err)
- goto mask_err;
-
- return 0;
-
-mask_err:
- drm_err(&xe->drm, "Can't set DMA mask/consistent mask (%d)\n", err);
- return err;
-}
-
static void
_resize_bar(struct xe_device *xe, int resno, resource_size_t size)
{
@@ -317,12 +297,11 @@ int xe_mmio_probe_vram(struct xe_device *xe)
return 0;
}
-static void xe_mmio_probe_tiles(struct xe_device *xe)
+void xe_mmio_probe_tiles(struct xe_device *xe)
{
size_t tile_mmio_size = SZ_16M, tile_mmio_ext_size = xe->info.tile_mmio_ext_size;
u8 id, tile_count = xe->info.tile_count;
struct xe_gt *gt = xe_root_mmio_gt(xe);
- const int mmio_bar = 0;
struct xe_tile *tile;
void *regs;
u32 mtcfg;
@@ -336,9 +315,6 @@ static void xe_mmio_probe_tiles(struct xe_device *xe)
if (tile_count < xe->info.tile_count) {
drm_info(&xe->drm, "tile_count: %d, reduced_tile_count %d\n",
xe->info.tile_count, tile_count);
- pci_iounmap(to_pci_dev(xe->drm.dev), xe->mmio.regs);
- xe->mmio.size = (tile_mmio_size + tile_mmio_ext_size) * tile_count;
- xe->mmio.regs = pci_iomap(to_pci_dev(xe->drm.dev), mmio_bar, xe->mmio.size);
xe->info.tile_count = tile_count;
/*
@@ -402,41 +378,37 @@ static int xe_verify_lmem_ready(struct xe_device *xe)
int xe_mmio_init(struct xe_device *xe)
{
- struct xe_tile *root_tile = xe_device_get_root_tile(xe);
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
const int mmio_bar = 0;
- int err;
/*
- * Map the maximum expected BAR size, which will get remapped later
- * if we determine that we're running on a reduced-tile system.
+ * Map the entire BAR.
* The first 16MB of the BAR, belong to the root tile, and include:
* registers (0-4MB), reserved space (4MB-8MB) and GGTT (8MB-16MB).
*/
- xe->mmio.size = (SZ_16M + xe->info.tile_mmio_ext_size) * xe->info.tile_count;
- xe->mmio.regs = pci_iomap(to_pci_dev(xe->drm.dev), mmio_bar, xe->mmio.size);
+ xe->mmio.size = pci_resource_len(pdev, mmio_bar);
+ xe->mmio.regs = pci_iomap(pdev, mmio_bar, 0);
if (xe->mmio.regs == NULL) {
drm_err(&xe->drm, "failed to map registers\n");
return -EIO;
}
- err = drmm_add_action_or_reset(&xe->drm, mmio_fini, xe);
- if (err)
- return err;
+ return drmm_add_action_or_reset(&xe->drm, mmio_fini, xe);
+}
+
+int xe_mmio_root_tile_init(struct xe_device *xe)
+{
+ struct xe_tile *root_tile = xe_device_get_root_tile(xe);
+ int err;
/* Setup first tile; other tiles (if present) will be setup later. */
- root_tile->mmio.size = xe->mmio.size;
+ root_tile->mmio.size = SZ_16M;
root_tile->mmio.regs = xe->mmio.regs;
err = xe_verify_lmem_ready(xe);
if (err)
return err;
- err = xe_set_dma_info(xe);
- if (err)
- return err;
-
- xe_mmio_probe_tiles(xe);
-
return 0;
}
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
index 218b796629ad..98de5c13c89b 100644
--- a/drivers/gpu/drm/xe/xe_mmio.h
+++ b/drivers/gpu/drm/xe/xe_mmio.h
@@ -21,6 +21,8 @@ struct xe_device;
#define LMEM_BAR 2
int xe_mmio_init(struct xe_device *xe);
+int xe_mmio_root_tile_init(struct xe_device *xe);
+void xe_mmio_probe_tiles(struct xe_device *xe);
static inline u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg)
{
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 270826fdb5ae..c949ec7ec43e 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -21,11 +21,13 @@
#include "xe_drv.h"
#include "xe_gt.h"
#include "xe_macros.h"
+#include "xe_mmio.h"
#include "xe_module.h"
#include "xe_pci_types.h"
#include "xe_pm.h"
#include "xe_sriov.h"
#include "xe_step.h"
+#include "xe_tile.h"
enum toggle_d3cold {
D3COLD_DISABLE,
@@ -443,26 +445,22 @@ find_subplatform(const struct xe_device *xe, const struct xe_device_desc *desc)
return NULL;
}
-static void peek_gmdid(struct xe_device *xe, u32 gmdid_offset, u32 *ver, u32 *revid)
+enum xe_gmdid_type {
+ GMDID_GRAPHICS,
+ GMDID_MEDIA
+};
+
+static void read_gmdid(struct xe_device *xe, enum xe_gmdid_type type, u32 *ver, u32 *revid)
{
- struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
- void __iomem *map = pci_iomap_range(pdev, 0, gmdid_offset, sizeof(u32));
+ struct xe_gt *gt = xe_root_mmio_gt(xe);
+ struct xe_reg gmdid_reg = GMD_ID;
u32 val;
- if (!map) {
- drm_err(&xe->drm, "Failed to read GMD_ID (%#x) from PCI BAR.\n",
- gmdid_offset);
- *ver = 0;
- *revid = 0;
-
- return;
- }
-
- val = ioread32(map);
- pci_iounmap(pdev, map);
+ if (type == GMDID_MEDIA)
+ gmdid_reg.addr += MEDIA_GT_GSI_OFFSET;
- *ver = REG_FIELD_GET(GMD_ID_ARCH_MASK, val) * 100 +
- REG_FIELD_GET(GMD_ID_RELEASE_MASK, val);
+ val = xe_mmio_read32(gt, gmdid_reg);
+ *ver = REG_FIELD_GET(GMD_ID_ARCH_MASK, val) * 100 + REG_FIELD_GET(GMD_ID_RELEASE_MASK, val);
*revid = REG_FIELD_GET(GMD_ID_REVID, val);
}
@@ -499,7 +497,8 @@ static void handle_gmdid(struct xe_device *xe,
{
u32 ver;
- peek_gmdid(xe, GMD_ID.addr, &ver, graphics_revid);
+ read_gmdid(xe, GMDID_GRAPHICS, &ver, graphics_revid);
+
for (int i = 0; i < ARRAY_SIZE(graphics_ip_map); i++) {
if (ver == graphics_ip_map[i].ver) {
xe->info.graphics_verx100 = ver;
@@ -514,7 +513,7 @@ static void handle_gmdid(struct xe_device *xe,
ver / 100, ver % 100);
}
- peek_gmdid(xe, GMD_ID.addr + 0x380000, &ver, media_revid);
+ read_gmdid(xe, GMDID_MEDIA, &ver, media_revid);
/* Media may legitimately be fused off / not present */
if (ver == 0)
@@ -535,6 +534,43 @@ static void handle_gmdid(struct xe_device *xe,
}
}
+/*
+ * Initialize device info content that only depends on static driver_data passed to the driver at
+ * probe time from PCI ID table.
+ */
+static int xe_info_init_early(struct xe_device *xe,
+ const struct xe_device_desc *desc,
+ const struct xe_subplatform_desc *subplatform_desc)
+{
+ int err;
+
+ xe->info.platform = desc->platform;
+ xe->info.subplatform = subplatform_desc ?
+ subplatform_desc->subplatform : XE_SUBPLATFORM_NONE;
+
+ xe->info.is_dgfx = desc->is_dgfx;
+ xe->info.has_heci_gscfi = desc->has_heci_gscfi;
+ xe->info.has_llc = desc->has_llc;
+ xe->info.has_sriov = desc->has_sriov;
+ xe->info.bypass_mtcfg = desc->bypass_mtcfg;
+ xe->info.supports_mmio_ext = desc->supports_mmio_ext;
+
+ xe->info.enable_display = IS_ENABLED(CONFIG_DRM_XE_DISPLAY) &&
+ xe_modparam.enable_display &&
+ desc->has_display;
+
+ err = xe_tile_init_early(xe_device_get_root_tile(xe), xe, 0);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+/*
+ * Initialize device info content that does require knowledge about graphics / media IP version.
+ * Make sure that GT / tile structures allocated by the driver match the data present in device
+ * info.
+ */
static int xe_info_init(struct xe_device *xe,
const struct xe_device_desc *desc,
const struct xe_subplatform_desc *subplatform_desc)
@@ -546,10 +582,6 @@ static int xe_info_init(struct xe_device *xe,
struct xe_gt *gt;
u8 id;
- xe->info.platform = desc->platform;
- xe->info.subplatform = subplatform_desc ?
- subplatform_desc->subplatform : XE_SUBPLATFORM_NONE;
-
/*
* If this platform supports GMD_ID, we'll detect the proper IP
* descriptor to use from hardware registers. desc->graphics will only
@@ -575,14 +607,8 @@ static int xe_info_init(struct xe_device *xe,
if (!graphics_desc)
return -ENODEV;
- xe->info.is_dgfx = desc->is_dgfx;
- xe->info.has_heci_gscfi = desc->has_heci_gscfi;
xe->info.graphics_name = graphics_desc->name;
xe->info.media_name = media_desc ? media_desc->name : "none";
- xe->info.has_llc = desc->has_llc;
- xe->info.has_sriov = desc->has_sriov;
- xe->info.bypass_mtcfg = desc->bypass_mtcfg;
- xe->info.supports_mmio_ext = desc->supports_mmio_ext;
xe->info.tile_mmio_ext_size = graphics_desc->tile_mmio_ext_size;
xe->info.dma_mask_size = graphics_desc->dma_mask_size;
@@ -595,9 +621,6 @@ static int xe_info_init(struct xe_device *xe,
xe->info.has_range_tlb_invalidation = graphics_desc->has_range_tlb_invalidation;
xe->info.skip_guc_pc = desc->skip_guc_pc;
- xe->info.enable_display = IS_ENABLED(CONFIG_DRM_XE_DISPLAY) &&
- xe_modparam.enable_display &&
- desc->has_display;
/*
* All platforms have at least one primary GT. Any platform with media
* version 13 or higher has an additional dedicated media GT. And
@@ -609,14 +632,15 @@ static int xe_info_init(struct xe_device *xe,
*/
xe->info.tile_count = 1 + graphics_desc->max_remote_tiles;
- for_each_tile(tile, xe, id) {
- tile->xe = xe;
- tile->id = id;
+ for_each_remote_tile(tile, xe, id) {
+ int err;
- tile->primary_gt = xe_gt_alloc(tile);
- if (IS_ERR(tile->primary_gt))
- return PTR_ERR(tile->primary_gt);
+ err = xe_tile_init_early(tile, xe, id);
+ if (err)
+ return err;
+ }
+ for_each_tile(tile, xe, id) {
gt = tile->primary_gt;
gt->info.id = xe->info.gt_count++;
gt->info.type = XE_GT_TYPE_MAIN;
@@ -695,25 +719,34 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (xe_display_driver_probe_defer(pdev))
return -EPROBE_DEFER;
+ err = pcim_enable_device(pdev);
+ if (err)
+ return err;
+
xe = xe_device_create(pdev, ent);
if (IS_ERR(xe))
return PTR_ERR(xe);
+ pci_set_drvdata(pdev, xe);
+
xe_pm_assert_unbounded_bridge(xe);
subplatform_desc = find_subplatform(xe, desc);
- pci_set_drvdata(pdev, xe);
- err = pci_enable_device(pdev);
- if (err)
- goto err_drm_put;
-
pci_set_master(pdev);
+ err = xe_info_init_early(xe, desc, subplatform_desc);
+ if (err)
+ return err;
+
xe_sriov_probe_early(xe, desc->has_sriov);
+ err = xe_device_probe_early(xe);
+ if (err)
+ return err;
+
err = xe_info_init(xe, desc, subplatform_desc);
if (err)
- goto err_pci_disable;
+ return err;
xe_display_probe(xe);
@@ -744,19 +777,11 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
err = xe_device_probe(xe);
if (err)
- goto err_pci_disable;
+ return err;
xe_pm_init(xe);
return 0;
-
-err_pci_disable:
- pci_disable_device(pdev);
-
-err_drm_put:
- drm_dev_put(&xe->drm);
-
- return err;
}
static void xe_pci_shutdown(struct pci_dev *pdev)
diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c
index 131752a57f65..731869e49b01 100644
--- a/drivers/gpu/drm/xe/xe_tile.c
+++ b/drivers/gpu/drm/xe/xe_tile.c
@@ -7,6 +7,7 @@
#include "xe_device.h"
#include "xe_ggtt.h"
+#include "xe_gt.h"
#include "xe_migrate.h"
#include "xe_sa.h"
#include "xe_tile.h"
@@ -80,7 +81,7 @@
*
* Returns -ENOMEM if allocations fail, otherwise 0.
*/
-int xe_tile_alloc(struct xe_tile *tile)
+static int xe_tile_alloc(struct xe_tile *tile)
{
struct drm_device *drm = &tile_to_xe(tile)->drm;
@@ -97,6 +98,35 @@ int xe_tile_alloc(struct xe_tile *tile)
return 0;
}
+/**
+ * xe_tile_init_early - Initialize the tile and primary GT
+ * @tile: Tile to initialize
+ * @xe: Parent Xe device
+ * @id: Tile ID
+ *
+ * Initializes per-tile resources that don't require any interactions with the hardware or any
+ * knowledge about the Graphics/Media IP version.
+ *
+ * Returns: 0 on success, negative error code on error.
+ */
+int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id)
+{
+ int err;
+
+ tile->xe = xe;
+ tile->id = id;
+
+ err = xe_tile_alloc(tile);
+ if (err)
+ return err;
+
+ tile->primary_gt = xe_gt_alloc(tile);
+ if (IS_ERR(tile->primary_gt))
+ return PTR_ERR(tile->primary_gt);
+
+ return 0;
+}
+
static int tile_ttm_mgr_init(struct xe_tile *tile)
{
struct xe_device *xe = tile_to_xe(tile);
@@ -136,10 +166,6 @@ int xe_tile_init_noalloc(struct xe_tile *tile)
if (err)
goto err_mem_access;
- err = xe_ggtt_init_noalloc(tile->mem.ggtt);
- if (err)
- goto err_mem_access;
-
tile->mem.kernel_bb_pool = xe_sa_bo_manager_init(tile, SZ_1M, 16);
if (IS_ERR(tile->mem.kernel_bb_pool))
err = PTR_ERR(tile->mem.kernel_bb_pool);
diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h
index 782c47f8bd45..1c9e42ade6b0 100644
--- a/drivers/gpu/drm/xe/xe_tile.h
+++ b/drivers/gpu/drm/xe/xe_tile.h
@@ -10,7 +10,7 @@
struct xe_tile;
-int xe_tile_alloc(struct xe_tile *tile);
+int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id);
int xe_tile_init_noalloc(struct xe_tile *tile);
void xe_tile_migrate_wait(struct xe_tile *tile);
--
2.40.1
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