[Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi
Umesh Nerlige Ramappa
umesh.nerlige.ramappa at intel.com
Wed Oct 4 02:33:45 UTC 2023
On Tue, Sep 19, 2023 at 09:10:43AM -0700, Ashutosh Dixit wrote:
>OA format names (in enum drm_xe_oa_format) have an overhead in that the
>uapi header has to be updated each time a HW introduces a new
>format. Instead of directly using OA format names, switch to using the same
>fields Bspec uses to specify formats. The fields change much less often
>than the format names. The format names are still internally maintained,
>just not exchanged through the uapi.
I am rethinking this now. Maybe we should retain the same thing that
existed in i915 - the enum of formats. I see some resistance to this
change from UMDs like Mesa. If the enum is easier for UMDs, let's just
retain that.
As for updating the UApi for each platform, we must make sure hardware
retains a backwards compatible OA format for new platforms. That's
outside the scope of this activity though.
Sorry about the churn, since I suggested this. Let me know if you think
otherwise.
Thanks,
Umesh
>
>Bspec: 52198, 60942
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
>---
> drivers/gpu/drm/xe/xe_oa.c | 52 +++++++++++++++++++++-----------
> drivers/gpu/drm/xe/xe_oa_types.h | 23 ++++++++++++--
> include/uapi/drm/xe_drm.h | 33 ++++++++++----------
> 3 files changed, 72 insertions(+), 36 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 19ad23b90e6ad..d49debe732bbd 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -53,10 +53,10 @@ static const struct xe_oa_format oa_formats[] = {
> [XE_OA_FORMAT_A12] = { 0, 64 },
> [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
> [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
>- [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
>+ [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256, XE_OA_FMT_TYPE_OAR },
> [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
>- [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT },
>- [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
>+ [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
>+ [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
> };
>
> struct xe_oa_open_properties {
>@@ -65,7 +65,7 @@ struct xe_oa_open_properties {
> u64 exec_q_id;
>
> int metrics_set;
>- int oa_format;
>+ enum xe_oa_format_name oa_format;
> bool oa_periodic;
> int oa_period_exponent;
>
>@@ -1529,13 +1529,6 @@ static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
> return div_u64(nom + den - 1, den);
> }
>
>-static bool oa_format_valid(struct xe_oa *oa, u64 format)
>-{
>- if (format >= XE_OA_FORMAT_MAX)
>- return false;
>- return test_bit(format, oa->format_mask);
>-}
>-
> static bool engine_supports_oa(const struct xe_hw_engine *hwe)
> {
> return hwe->oa_group;
>@@ -1543,7 +1536,32 @@ static bool engine_supports_oa(const struct xe_hw_engine *hwe)
>
> static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
> {
>- return hwe->oa_group && hwe->oa_group->type == type;
>+ switch (hwe->oa_group->type) {
>+ case TYPE_OAG:
>+ return type == XE_OA_FMT_TYPE_OAG || type == XE_OA_FMT_TYPE_OAR;
>+ case TYPE_OAM:
>+ return type == XE_OA_FMT_TYPE_OAM || type == XE_OA_FMT_TYPE_OAM_MPEC;
>+ default:
>+ return false;
>+ }
>+}
>+
>+static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *name)
>+{
>+ u32 counter_sel = FIELD_GET(XE_OA_MASK_COUNTER_SEL, prop);
>+ u32 type = FIELD_GET(XE_OA_MASK_FMT_TYPE, prop);
>+ int idx;
>+
>+ for_each_set_bit(idx, oa->format_mask, XE_OA_FORMAT_MAX) {
>+ const struct xe_oa_format *f = &oa->oa_formats[idx];
>+
>+ if (type == f->type && counter_sel == f->format) {
>+ *name = idx;
>+ return 0;
>+ }
>+ }
>+
>+ return -EINVAL;
> }
>
> #define OA_EXPONENT_MAX 31
>@@ -1600,12 +1618,12 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> props->metrics_set = value;
> break;
> case DRM_XE_OA_PROP_OA_FORMAT:
>- if (!oa_format_valid(oa, value)) {
>- drm_dbg(&oa->xe->drm, "Unsupported OA report format %llu\n",
>+ ret = decode_oa_format(oa, value, &props->oa_format);
>+ if (ret) {
>+ drm_dbg(&oa->xe->drm, "Unsupported OA report format %#llx\n",
> value);
>- return -EINVAL;
>+ return ret;
> }
>- props->oa_format = value;
> break;
> case DRM_XE_OA_PROP_OA_EXPONENT:
> if (value > OA_EXPONENT_MAX) {
>@@ -2227,7 +2245,7 @@ u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
> hwe->oa_group->oa_unit_id : U16_MAX;
> }
>
>-static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
>+static void oa_format_add(struct xe_oa *oa, enum xe_oa_format_name format)
> {
> __set_bit(format, oa->format_mask);
> }
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>index ac8b23695cc6e..3cc1d88fe4a51 100644
>--- a/drivers/gpu/drm/xe/xe_oa_types.h
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -24,7 +24,7 @@ enum {
> OA_GROUP_INVALID = U32_MAX,
> };
>
>-enum oa_type {
>+enum oa_unit_type {
> TYPE_OAG,
> TYPE_OAM,
> };
>@@ -34,6 +34,25 @@ enum report_header {
> HDR_64_BIT,
> };
>
>+enum xe_oa_format_name {
>+ XE_OA_FORMAT_C4_B8 = 7,
>+
>+ /* Gen8+ */
>+ XE_OA_FORMAT_A12,
>+ XE_OA_FORMAT_A12_B8_C8,
>+ XE_OA_FORMAT_A32u40_A4u32_B8_C8,
>+
>+ /* DG2 */
>+ XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
>+ XE_OA_FORMAT_A24u40_A14u32_B8_C8,
>+
>+ /* MTL OAM */
>+ XE_OAM_FORMAT_MPEC8u64_B8_C8,
>+ XE_OAM_FORMAT_MPEC8u32_B8_C8,
>+
>+ XE_OA_FORMAT_MAX,
>+};
>+
> struct xe_oa_format {
> u32 format;
> int size;
>@@ -96,7 +115,7 @@ struct xe_oa_group {
> struct xe_oa_regs regs;
>
> /** @type: Type of OA unit - OAM, OAG etc. */
>- enum oa_type type;
>+ enum oa_unit_type type;
> };
>
> /**
>diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>index fe873dc63fc5a..77949c5abcee1 100644
>--- a/include/uapi/drm/xe_drm.h
>+++ b/include/uapi/drm/xe_drm.h
>@@ -1124,23 +1124,13 @@ struct drm_xe_perf_param {
> __u64 param;
> };
>
>-enum drm_xe_oa_format {
>- XE_OA_FORMAT_C4_B8 = 7,
>-
>- /* Gen8+ */
>- XE_OA_FORMAT_A12,
>- XE_OA_FORMAT_A12_B8_C8,
>- XE_OA_FORMAT_A32u40_A4u32_B8_C8,
>-
>- /* DG2 */
>- XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
>- XE_OA_FORMAT_A24u40_A14u32_B8_C8,
>-
>- /* MTL OAM */
>- XE_OAM_FORMAT_MPEC8u64_B8_C8,
>- XE_OAM_FORMAT_MPEC8u32_B8_C8,
>-
>- XE_OA_FORMAT_MAX /* non-ABI */
>+enum drm_xe_oa_format_type {
>+ XE_OA_FMT_TYPE_OAG,
>+ XE_OA_FMT_TYPE_OAR,
>+ XE_OA_FMT_TYPE_OAM,
>+ XE_OA_FMT_TYPE_OAC,
>+ XE_OA_FMT_TYPE_OAM_MPEC,
>+ XE_OA_FMT_TYPE_PEC,
> };
>
> enum drm_xe_oa_property_id {
>@@ -1167,6 +1157,15 @@ enum drm_xe_oa_property_id {
> * The value specifies the size and layout of OA unit reports.
> */
> DRM_XE_OA_PROP_OA_FORMAT,
>+ /**
>+ * OA_FORMAT's are specified the same way as in Bspec, in terms of
>+ * the following quantities: a. enum @drm_xe_oa_format_type
>+ * b. Counter select c. Counter size and d. BC report
>+ */
>+#define XE_OA_MASK_FMT_TYPE (0xff << 0)
>+#define XE_OA_MASK_COUNTER_SEL (0xff << 8)
>+#define XE_OA_MASK_COUNTER_SIZE (0xff << 16)
>+#define XE_OA_MASK_BC_REPORT (0xff << 24)
>
> /**
> * Specifying this property implicitly requests periodic OA unit
>--
>2.41.0
>
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