[Intel-xe] ✗ CI.checkpatch: warning for series starting with [v2,1/3] drm/xe: Store xe_he_engine in xe_hw_engine_snapshot

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/3] drm/xe: Store xe_he_engine in xe_hw_engine_snapshot
URL   : https://patchwork.freedesktop.org/series/124857/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9f7a635a3659cc527b63a84d8f436530d5ade045
Author: José Roberto de Souza <jose.souza at intel.com>
Date:   Mon Oct 9 13:21:49 2023 -0700

    drm/xe: Add INSTDONE registers to devcoredump
    
    This registers contains important information that can help with debug
    of GPU hangs.
    
    While at it also fixing the double line jump at the end of engine
    registers for CCS engines.
    
    v2:
    - print other INSTDONE registers
    
    Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
    Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
+ /mt/dim checkpatch 37b2d042c23ae6a10055ea92101a15083d64c718 drm-intel
841d276c5 drm/xe: Store xe_he_engine in xe_hw_engine_snapshot
89bcf3e85 drm/xe: Add misc functions to support read of specific DSS registers
9f7a635a3 drm/xe: Add INSTDONE registers to devcoredump
-:79: WARNING:NEW_TYPEDEFS: do not add new typedefs
#79: FILE: drivers/gpu/drm/xe/xe_gt_types.h:31:
+typedef unsigned long xe_dss_mask_t[BITS_TO_LONGS(XE_MAX_DSS_FUSE_BITS)];

total: 0 errors, 1 warnings, 0 checks, 215 lines checked