[Intel-xe] [PATCH v2] drm/xe: Set PTE_AE for smem alocation as well

[Lucas De Marchi]

On Thu, Oct 05, 2023 at 07:39:21AM -0700, Jose Souza wrote:
>Without this if a atomic operation is executed over smem it causes
>engine memory catastrophic error.
>
>This fixes at least 3 failures in piglit sanity and 2 failures in
>crucible for LNL.
>
>Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

But there's the pending discussion with Matt Roper on whether this is
correct for discrete.  It's different to have an integrated platform
dealing with system memory and a discrete one dealing with system
memory.  Let's wait that settle before merging.

thanks
Lucas De Marchi

>---
> drivers/gpu/drm/xe/xe_pt.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
>index 70a8bd3558c2a..4bdf7edd948d5 100644
>--- a/drivers/gpu/drm/xe/xe_pt.c
>+++ b/drivers/gpu/drm/xe/xe_pt.c
>@@ -648,10 +648,11 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
> 	struct xe_pt *pt = xe_vma_vm(vma)->pt_root[tile->id];
> 	int ret;
>
>+	if (vma && (vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT))
>+		xe_walk.default_pte |= XE_USM_PPGTT_PTE_AE;
>+
> 	if (is_devmem) {
>-		xe_walk.default_pte = XE_PPGTT_PTE_DM;
>-		if (vma && vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT)
>-			xe_walk.default_pte |= XE_USM_PPGTT_PTE_AE;
>+		xe_walk.default_pte |= XE_PPGTT_PTE_DM;
> 		xe_walk.dma_offset = vram_region_gpu_offset(bo->ttm.resource);
> 		xe_walk.cache = XE_CACHE_WB;
> 	} else {
>-- 
>2.42.0
>