[Intel-xe] [PATCH 10/21] drm/xe/oa: Implement queries

Umesh Nerlige Ramappa umesh.nerlige.ramappa at intel.com
Sat Oct 14 00:58:18 UTC 2023


On Tue, Sep 19, 2023 at 09:10:38AM -0700, Ashutosh Dixit wrote:
>Implement queries to query OA unit ID's for HW engines, OA timestamp freq
>and OA ioctl version.
>
>v2: Convert oa_unit_id to u16 (Umesh)
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>

I guess this will change in the next revision, so will review that.

Umesh
>---
> drivers/gpu/drm/xe/xe_oa.c    | 11 +++++++++++
> drivers/gpu/drm/xe/xe_oa.h    |  3 +++
> drivers/gpu/drm/xe/xe_query.c |  6 +++++-
> 3 files changed, 19 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index d6d9dcc5c0bda..fc0159543dc74 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -2212,6 +2212,12 @@ static int xe_oa_init_engine_groups(struct xe_oa *oa)
> 	return 0;
> }
>
>+u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
>+{
>+	return hwe->oa_group && hwe->oa_group->num_engines ?
>+		hwe->oa_group->oa_unit_id : U16_MAX;
>+}
>+
> static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
> {
> 	__set_bit(format, oa->format_mask);
>@@ -2325,6 +2331,11 @@ static struct ctl_table oa_ctl_table[] = {
> 	{}
> };
>
>+int xe_oa_ioctl_version(struct xe_device *xe)
>+{
>+	return 1;
>+}
>+
> int xe_oa_sysctl_register(void)
> {
> 	sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
>diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
>index fd6caf652047a..1f3d05067f19d 100644
>--- a/drivers/gpu/drm/xe/xe_oa.h
>+++ b/drivers/gpu/drm/xe/xe_oa.h
>@@ -22,4 +22,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> 			   struct drm_file *file);
> int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
> 			      struct drm_file *file);
>+u32 xe_oa_timestamp_frequency(struct xe_device *xe);
>+u16 xe_oa_unit_id(struct xe_hw_engine *hwe);
>+
> #endif
>diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
>index a951205100fea..4a3a9c11e8cc4 100644
>--- a/drivers/gpu/drm/xe/xe_query.c
>+++ b/drivers/gpu/drm/xe/xe_query.c
>@@ -78,7 +78,9 @@ static int query_engines(struct xe_device *xe,
> 				xe_to_user_engine_class[hwe->class];
> 			hw_engine_info[i].engine_instance =
> 				hwe->logical_instance;
>-			hw_engine_info[i++].gt_id = gt->info.id;
>+			hw_engine_info[i].gt_id = gt->info.id;
>+			hw_engine_info[i].oa_unit_id = xe_oa_unit_id(hwe);
>+			i++;
> 		}
>
> 	if (copy_to_user(query_ptr, hw_engine_info, size)) {
>@@ -200,6 +202,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> 		hweight_long(xe->info.mem_region_mask);
> 	config->info[XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY] =
> 		xe_exec_queue_device_get_max_priority(xe);
>+	config->info[XE_QUERY_OA_IOCTL_VERSION] = xe_oa_ioctl_version(xe);
>
> 	if (copy_to_user(query_ptr, config, size)) {
> 		kfree(config);
>@@ -241,6 +244,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
> 			gts->gts[id].type = XE_QUERY_GT_TYPE_MAIN;
> 		gts->gts[id].instance = id;
> 		gts->gts[id].clock_freq = gt->info.clock_freq;
>+		gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(xe);
> 		if (!IS_DGFX(xe))
> 			gts->gts[id].native_mem_regions = 0x1;
> 		else
>-- 
>2.41.0
>


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