[Intel-xe] [PATCH v2 5/6] drm/xe/debugfs: Add dump of default LRCs' MI instructions

Lucas De Marchi lucas.demarchi at intel.com
Mon Oct 16 16:02:35 UTC 2023


On Fri, Oct 13, 2023 at 03:02:56PM -0700, Matt Roper wrote:
>For non-RCS engines, nearly all of the LRC state is composed of MI
>instructions (specifically MI_LOAD_REGISTER_IMM).  Providing a dump
>interface allows us to verify that the context image layout matches
>what's documented in the bspec, and also allows us to check whether LRC
>workarounds are being properly captured by the default state we record
>at startup.
>
>For now, the non-MI instructions found in the RCS and CCS engines will
>dump as "unknown;" parsing of those will be added in a follow-up patch.
>
>v2:
> - Add raw instruction header as well as decoded meaning.  (Lucas)
> - Check that num_dw isn't greater than remaining_dw for instructions
>   that have a "# dwords" field.  (Lucas)
> - Clarify comment about skipping over ppHWSP.  (Lucas)
>
>Bspec: 64993
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi


More information about the Intel-xe mailing list