[Intel-xe] ✗ CI.checkpatch: warning for Emit SVG 3DSTATE during LRC init

Patchwork patchwork at emeril.freedesktop.org
Tue Oct 17 23:21:33 UTC 2023


== Series Details ==

Series: Emit SVG 3DSTATE during LRC init
URL   : https://patchwork.freedesktop.org/series/125255/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0098d78acacdad7f12f8b3cdaa19f9b2c1c66e24
Author: Matt Roper <matthew.d.roper at intel.com>
Date:   Tue Oct 17 16:18:47 2023 -0700

    drm/xe/xe2: Update SVG state handling
    
    As with DG2/MTL, Xe2 also fails to emit instruction headers for SVG
    state instructions if no explicit state has been set.  The SVG part of
    the LRC is nearly identical to DG2/MTL; the only change is that
    3DSTATE_DRAWING_RECTANGLE has been replaced by
    3DSTATE_DRAWING_RECTANGLE_FAST, so we can just re-use the same state
    table and handle that single instruction when we encounter it.
    
    Bspec: 65182
    Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
+ /mt/dim checkpatch 4d039d7be23937e2b498ed783aa5b0d8801b377b drm-intel
e6eda054e drm/xe: Prepare to emit non-register state while recording default LRC
-:78: ERROR:SPACING: space required before the open parenthesis '('
#78: FILE: drivers/gpu/drm/xe/xe_lrc.c:1132:
+	switch(GRAPHICS_VERx100(xe)) {

total: 1 errors, 0 warnings, 0 checks, 88 lines checked
9ea636cf7 drm/xe: Emit SVG state on RCS during driver load on DG2 and MTL
0098d78ac drm/xe/xe2: Update SVG state handling




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