[Intel-xe] [PATCH 1/1] fixup! drm/xe/gsc: add gsc device support
Usyskin, Alexander
alexander.usyskin at intel.com
Tue Oct 24 06:12:34 UTC 2023
> -----Original Message-----
> From: Ceraolo Spurio, Daniele <daniele.ceraolospurio at intel.com>
> Sent: Tuesday, October 24, 2023 00:53
> To: intel-xe at lists.freedesktop.org
> Cc: Ceraolo Spurio, Daniele <daniele.ceraolospurio at intel.com>; Vivi, Rodrigo
> <rodrigo.vivi at intel.com>; Lubart, Vitaly <vitaly.lubart at intel.com>; Usyskin,
> Alexander <alexander.usyskin at intel.com>
> Subject: [PATCH 1/1] fixup! drm/xe/gsc: add gsc device support
>
> 2 fixes:
>
> 1) The gsc_mask variable is not set in all branches, but it is always
> evaluated in an if condition, so we need to initialize it to a valid
> value
>
> 2) On MTL+ the GSC interrupts come from the engine, so we can't
> unconditionally call the handler for the GSCFI interface and we
> instead need to check if we're on a platform that does have a GSCFI.
>
> While at it, move the GSCFI irq function call to where the other
> non-engine OTHER_CLASS interrupts are handled.
>
Reviewed-by: Alexander Usyskin <alexander.usyskin at intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Vitaly Lubart <vitaly.lubart at intel.com>
> Cc: Alexander Usyskin <alexander.usyskin at intel.com>
> ---
> drivers/gpu/drm/xe/xe_irq.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
> index 61350ed32c61..21d5273d7e61 100644
> --- a/drivers/gpu/drm/xe/xe_irq.c
> +++ b/drivers/gpu/drm/xe/xe_irq.c
> @@ -142,7 +142,7 @@ void xe_irq_enable_hwe(struct xe_gt *gt)
> struct xe_device *xe = gt_to_xe(gt);
> u32 ccs_mask, bcs_mask;
> u32 irqs, dmask, smask;
> - u32 gsc_mask;
> + u32 gsc_mask = 0;
>
> if (xe_device_uc_enabled(xe)) {
> irqs = GT_RENDER_USER_INTERRUPT |
> @@ -303,11 +303,6 @@ static void gt_irq_handler(struct xe_tile *tile,
> instance = INTR_ENGINE_INSTANCE(identity[bit]);
> intr_vec = INTR_ENGINE_INTR(identity[bit]);
>
> - if (class == XE_ENGINE_CLASS_OTHER && instance ==
> OTHER_GSC_INSTANCE) {
> - xe_heci_gsc_irq_handler(xe, intr_vec);
> - continue;
> - }
> -
> engine_gt = pick_engine_gt(tile, class, instance);
>
> hwe = xe_gt_hw_engine(engine_gt, class, instance, false);
> @@ -317,7 +312,11 @@ static void gt_irq_handler(struct xe_tile *tile,
> }
>
> if (class == XE_ENGINE_CLASS_OTHER) {
> - gt_other_irq_handler(engine_gt, instance,
> intr_vec);
> + /* HECI GSCFI interrupts come from outside of GT
> */
> + if (HAS_HECI_GSCFI(xe) && instance ==
> OTHER_GSC_INSTANCE)
> + xe_heci_gsc_irq_handler(xe, intr_vec);
> + else
> + gt_other_irq_handler(engine_gt, instance,
> intr_vec);
> continue;
> }
> }
> --
> 2.41.0
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