[Intel-xe] ✗ CI.checkpatch: warning for drm/xe: Clear-media HuC support for MTL (rev3)

[Patchwork]

== Series Details ==

Series: drm/xe: Clear-media HuC support for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/123816/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit dfdccb7b7141988e4575b6f07eef1631d9048134
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Date:   Wed Oct 25 10:57:45 2023 -0700

    drm/xe/huc: Define HuC for MTL
    
    MTL uses a versionless GSC-enabled binary.
    
    v2: don't use the filename to identify the header type (Lucas)
    v3: fix commit msg (Lucas)
    
    Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
    Cc: Alan Previn <alan.previn.teres.alexis at intel.com>
    Cc: John Harrison <John.C.Harrison at Intel.com>
    Cc: Lucas De Marchi <lucas.demarchi at intel.com>
    Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
+ /mt/dim checkpatch bd3d7e8aa312ce25c5797388f753151f024bec02 drm-intel
809c17be4 drm/xe/uc: Prepare for parsing of different header types
ffce2d03a drm/xe/huc: Extract version and binary offset from new HuC headers
-:51: ERROR:POINTER_LOCATION: "foo* bar" should be "foo *bar"
#51: FILE: drivers/gpu/drm/xe/xe_uc_fw.c:405:
+static bool is_cpd_header(const void* data)

-:63: ERROR:POINTER_LOCATION: "(foo*)" should be "(foo *)"
#63: FILE: drivers/gpu/drm/xe/xe_uc_fw.c:417:
+	entry = (void*)header + header->header_length;

-:166: WARNING:UNNECESSARY_BREAK: break is not useful after a return
#166: FILE: drivers/gpu/drm/xe/xe_uc_fw.c:519:
+		return parse_css_header(uc_fw, fw->data, fw->size);
+		break;

total: 2 errors, 1 warnings, 0 checks, 284 lines checked
384e956fa drm/xe/huc: HuC is not supported on GTs that don't have video engines
-:32: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'gt != tile->media_gt'
#32: FILE: drivers/gpu/drm/xe/xe_huc.c:46:
+	if (tile->media_gt && (gt != tile->media_gt)) {

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
9dd3e7f9c drm/xe/huc: Don't re-auth HuC if it's already authenticated
dfdccb7b7 drm/xe/huc: Define HuC for MTL
-:31: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#31: FILE: drivers/gpu/drm/xe/xe_uc_fw.c:115:
+#define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver)		\
+	fw_def(METEORLAKE,	no_ver(i915,	huc_gsc,	mtl))		\
+	fw_def(DG1,		no_ver(i915,	huc,		dg1))		\
+	fw_def(ALDERLAKE_P,	no_ver(i915,	huc,		tgl))		\
+	fw_def(ALDERLAKE_S,	no_ver(i915,	huc,		tgl))		\
+	fw_def(ROCKETLAKE,	no_ver(i915,	huc,		tgl))		\
+	fw_def(TIGERLAKE,	no_ver(i915,	huc,		tgl))

-:31: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw_def' - possible side-effects?
#31: FILE: drivers/gpu/drm/xe/xe_uc_fw.c:115:
+#define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver)		\
+	fw_def(METEORLAKE,	no_ver(i915,	huc_gsc,	mtl))		\
+	fw_def(DG1,		no_ver(i915,	huc,		dg1))		\
+	fw_def(ALDERLAKE_P,	no_ver(i915,	huc,		tgl))		\
+	fw_def(ALDERLAKE_S,	no_ver(i915,	huc,		tgl))		\
+	fw_def(ROCKETLAKE,	no_ver(i915,	huc,		tgl))		\
+	fw_def(TIGERLAKE,	no_ver(i915,	huc,		tgl))

-:31: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'no_ver' - possible side-effects?
#31: FILE: drivers/gpu/drm/xe/xe_uc_fw.c:115:
+#define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver)		\
+	fw_def(METEORLAKE,	no_ver(i915,	huc_gsc,	mtl))		\
+	fw_def(DG1,		no_ver(i915,	huc,		dg1))		\
+	fw_def(ALDERLAKE_P,	no_ver(i915,	huc,		tgl))		\
+	fw_def(ALDERLAKE_S,	no_ver(i915,	huc,		tgl))		\
+	fw_def(ROCKETLAKE,	no_ver(i915,	huc,		tgl))		\
+	fw_def(TIGERLAKE,	no_ver(i915,	huc,		tgl))

total: 1 errors, 0 warnings, 2 checks, 19 lines checked