[Intel-xe] ✓ CI.checkpatch: success for Emit SVG 3DSTATE during LRC init (rev3)

[Patchwork]

== Series Details ==

Series: Emit SVG 3DSTATE during LRC init (rev3)
URL   : https://patchwork.freedesktop.org/series/125255/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 08bf179ab360adcfa99ad8de5d16dd1416fbba8b
Author: Matt Roper <matthew.d.roper at intel.com>
Date:   Wed Oct 25 08:17:36 2023 -0700

    drm/xe/xe2: Update SVG state handling
    
    As with DG2/MTL, Xe2 also fails to emit instruction headers for SVG
    state instructions if no explicit state has been set.  The SVG part of
    the LRC is nearly identical to DG2/MTL; the only change is that
    3DSTATE_DRAWING_RECTANGLE has been replaced by
    3DSTATE_DRAWING_RECTANGLE_FAST, so we can just re-use the same state
    table and handle that single instruction when we encounter it.
    
    Bspec: 65182
    Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan at intel.com>
    Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
+ /mt/dim checkpatch bd3d7e8aa312ce25c5797388f753151f024bec02 drm-intel
a35f9e6a9 drm/xe: Prepare to emit non-register state while recording default LRC
ab1a1a329 drm/xe: Emit SVG state on RCS during driver load on DG2 and MTL
08bf179ab drm/xe/xe2: Update SVG state handling