[Intel-xe] [PATCH 2/3] drm/xe: Add dbg messages for LRC WAs

Lucas De Marchi lucas.demarchi at intel.com
Tue Sep 5 14:31:43 UTC 2023


Just like the GT and engine workarounds, add debug message with the
final value being written to the register for easy debugging.

Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
 drivers/gpu/drm/xe/xe_gt.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 3d6a7c11bac1..bd307770a620 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -116,6 +116,7 @@ static int emit_nop_job(struct xe_gt *gt, struct xe_exec_queue *q)
 
 static int emit_wa_job(struct xe_gt *gt, struct xe_exec_queue *q)
 {
+	struct xe_device *xe = gt_to_xe(gt);
 	struct xe_reg_sr *sr = &q->hwe->reg_lrc;
 	struct xe_reg_sr_entry *entry;
 	unsigned long reg;
@@ -133,10 +134,14 @@ static int emit_wa_job(struct xe_gt *gt, struct xe_exec_queue *q)
 		++count;
 
 	if (count) {
+		drm_dbg(&xe->drm, "LRC WA %s save-restore MMIOs\n", sr->name);
+
 		bb->cs[bb->len++] = MI_LOAD_REGISTER_IMM(count);
 		xa_for_each(&sr->xa, reg, entry) {
 			bb->cs[bb->len++] = reg;
 			bb->cs[bb->len++] = entry->set_bits;
+			drm_dbg(&xe->drm, "REG[0x%lx] = 0x%08x", reg,
+				entry->set_bits);
 		}
 	}
 
-- 
2.40.1



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