[Intel-xe] [Intel-gfx] [PATCH v2 12/27] FIXME: drm/i915/xe2lpd: Add display power well

[Lucas De Marchi]

On Thu, Sep 07, 2023 at 10:57:41AM -0700, Matt Roper wrote:
>On Thu, Sep 07, 2023 at 08:37:42AM -0700, Lucas De Marchi wrote:
>> From: Ravi Kumar Vodapalli <ravi.kumar.vodapalli at intel.com>
>>
>> Add Display Power Well for LNL platform, mostly it is same as MTL
>> platform so reused the code
>>
>> Changes are:
>> 1. AUX_CH_CTL and AUX_CH_DATA1 are different from MTL so added extra
>>    logic xelpdp_aux_power_well_ops functions.
>> 2. PGPICA1 contains type-C capable port slices which requires the well
>>    to power powered up, so added new power well definition for PGPICA1
>>
>> FIXME: make this commit and "drm/i915/xe2lpd: Move registers to PICA"
>> to use a similar approach how the ranges are handled
>
>Is this FIXME still planned before we apply this?  Or are you expecting
>to do it as a follow-up commit later?

Before applying. What I'm looking for here is to get agreement on the
approach done in "drm/i915/xe2lpd: Move registers to PICA" as it changed
from v1 (even outside the feedback received).

Lucas De Marchi