[Intel-xe] [Intel-gfx] [PATCH v2 05/27] drm/i915/xe2lpd: Add fake PCH

[Lucas De Marchi]

On Thu, Sep 07, 2023 at 10:04:42AM -0700, Matt Roper wrote:
>On Thu, Sep 07, 2023 at 08:37:35AM -0700, Lucas De Marchi wrote:
>> From: Gustavo Sousa <gustavo.sousa at intel.com>
>>
>> Xe2_LPD has sourth display on the same SOC. As such, define a new fake
>
>s/sourth/south/
>
>You might also want to drop the word "same" from the description here
>since NDE and SDE are technically on different dies in this case (NDE is
>on the compute die, whereas SDE is on the SoC die).  To be 100% accurate
>we'd want to identify SDE behavior via the PICA's GMD_ID (since PICA
>also lives on the SoC die for this platform).  But since we've just been

I'd not re-architect this based on where the PICA lives as it seems very
easy to change in future.... tying the SDE behavior to the PICA behavior
because they are on the same die, doesn't seem very future proof.

Here the real reason for the change is that from the SW perspective they
are under the same PCI device and there's no reason to look for a
different one. Maybe rewording it a "Xe2_LPD has south display on the
same PCI device" would be simpler?

Lucas De Marchi

>able to get by so far with just matching PICA behavior on the display
>version rather than on its own version, we can just use display version
>for this as well, at least for now.  We may need to revisit this all
>down the road once we have platforms with more possible combinations of
>these components.  Of course we really need to rework the SDE handling
>in general (and break its assumption that SDE behavior is tied to PCH on
>modern platforms), but that's work for a future patch series.
>
>I was originally wondering if we could just reuse PCH_MTP here, but it
>looks like there's one place where we setup HPD interrupts that needs
>different handling.  So this should be good enough for now, and we can
>revisit the whole SDE design separately down the road.
>
>With the minor commit message fix above,
>
>Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
>
>
>> PCH entry for it.
>>
>> v2: Match on display IP version rather than on platform (Matt Roper)
>>
>> Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>
>> ---
>>  drivers/gpu/drm/i915/soc/intel_pch.c | 5 ++++-
>>  drivers/gpu/drm/i915/soc/intel_pch.h | 2 ++
>>  2 files changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/soc/intel_pch.c b/drivers/gpu/drm/i915/soc/intel_pch.c
>> index dfffdfa50b97..240beafb38ed 100644
>> --- a/drivers/gpu/drm/i915/soc/intel_pch.c
>> +++ b/drivers/gpu/drm/i915/soc/intel_pch.c
>> @@ -222,7 +222,10 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
>>  	 * South display engine on the same PCI device: just assign the fake
>>  	 * PCH.
>>  	 */
>> -	if (IS_DG2(dev_priv)) {
>> +	if (DISPLAY_VER(dev_priv) >= 20) {
>> +		dev_priv->pch_type = PCH_LNL;
>> +		return;
>> +	} else if (IS_DG2(dev_priv)) {
>>  		dev_priv->pch_type = PCH_DG2;
>>  		return;
>>  	} else if (IS_DG1(dev_priv)) {
>> diff --git a/drivers/gpu/drm/i915/soc/intel_pch.h b/drivers/gpu/drm/i915/soc/intel_pch.h
>> index 32aff5a70d04..1b03ea60a7a8 100644
>> --- a/drivers/gpu/drm/i915/soc/intel_pch.h
>> +++ b/drivers/gpu/drm/i915/soc/intel_pch.h
>> @@ -30,6 +30,7 @@ enum intel_pch {
>>  	/* Fake PCHs, functionality handled on the same PCI dev */
>>  	PCH_DG1 = 1024,
>>  	PCH_DG2,
>> +	PCH_LNL,
>>  };
>>
>>  #define INTEL_PCH_DEVICE_ID_MASK		0xff80
>> @@ -66,6 +67,7 @@ enum intel_pch {
>>
>>  #define INTEL_PCH_TYPE(dev_priv)		((dev_priv)->pch_type)
>>  #define INTEL_PCH_ID(dev_priv)			((dev_priv)->pch_id)
>> +#define HAS_PCH_LNL(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_LNL)
>>  #define HAS_PCH_MTP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_MTP)
>>  #define HAS_PCH_DG2(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_DG2)
>>  #define HAS_PCH_ADP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_ADP)
>> --
>> 2.40.1
>>
>
>-- 
>Matt Roper
>Graphics Software Engineer
>Linux GPU Platform Enablement
>Intel Corporation