[Intel-xe] [PATCH] drm/xe/mmio: Account for GSI offset when checking ranges
Lucas De Marchi
lucas.demarchi at intel.com
Fri Sep 8 22:52:27 UTC 2023
Change xe_mmio_in_range() to use the same logic to account for the GT's
adj_offset as the read and write functions. This is needed when checking
ranges for the MCR registers if the GT has an offset to adjust.
Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
drivers/gpu/drm/xe/xe_gt_mcr.c | 4 ++--
drivers/gpu/drm/xe/xe_mmio.h | 6 +++++-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index e74d3c5743c8..77925b35cf8d 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -448,7 +448,7 @@ static bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
continue;
for (int i = 0; gt->steering[type].ranges[i].end > 0; i++) {
- if (xe_mmio_in_range(>->steering[type].ranges[i], reg)) {
+ if (xe_mmio_in_range(gt, >->steering[type].ranges[i], reg)) {
*group = gt->steering[type].group_target;
*instance = gt->steering[type].instance_target;
return true;
@@ -459,7 +459,7 @@ static bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
implicit_ranges = gt->steering[IMPLICIT_STEERING].ranges;
if (implicit_ranges)
for (int i = 0; implicit_ranges[i].end > 0; i++)
- if (xe_mmio_in_range(&implicit_ranges[i], reg))
+ if (xe_mmio_in_range(gt, &implicit_ranges[i], reg))
return false;
/*
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
index cd9fe08ccf4a..9e0fd4a6fb29 100644
--- a/drivers/gpu/drm/xe/xe_mmio.h
+++ b/drivers/gpu/drm/xe/xe_mmio.h
@@ -127,9 +127,13 @@ static inline int xe_mmio_wait32(struct xe_gt *gt, struct xe_reg reg, u32 mask,
int xe_mmio_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-static inline bool xe_mmio_in_range(const struct xe_mmio_range *range,
+static inline bool xe_mmio_in_range(const struct xe_gt *gt,
+ const struct xe_mmio_range *range,
struct xe_reg reg)
{
+ if (reg.addr < gt->mmio.adj_limit)
+ reg.addr += gt->mmio.adj_offset;
+
return range && reg.addr >= range->start && reg.addr <= range->end;
}
--
2.40.1
More information about the Intel-xe
mailing list