[Intel-xe] [Intel-gfx] [PATCH v3 15/29] drm/i915/xe2lpd: Re-order DP AUX regs
Matt Roper
matthew.d.roper at intel.com
Tue Sep 12 15:52:33 UTC 2023
On Mon, Sep 11, 2023 at 09:48:23PM -0700, Lucas De Marchi wrote:
> The address of CTL and DATA registers for DP AUX were changed in Xe2_LPD:
> now they are all in a single range, with CH_A and CH_B coming right after
> the USBC instances. Like was done when moving registers to PICA, use
> a helper macro to remap the ch passed to an index that can be used to
> calculate the right offset.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> .../i915/display/intel_display_power_well.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 8 ++++----
> .../gpu/drm/i915/display/intel_dp_aux_regs.h | 19 +++++++++++++++++--
> 3 files changed, 24 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 820b7d41a0a8..ca0714eba17a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -1800,7 +1800,7 @@ static void xelpdp_aux_power_well_enable(struct drm_i915_private *dev_priv,
> icl_tc_port_assert_ref_held(dev_priv, power_well,
> aux_ch_to_digital_port(dev_priv, aux_ch));
>
> - intel_de_rmw(dev_priv, XELPDP_DP_AUX_CH_CTL(aux_ch),
> + intel_de_rmw(dev_priv, XELPDP_DP_AUX_CH_CTL(dev_priv, aux_ch),
> XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,
> XELPDP_DP_AUX_CH_CTL_POWER_REQUEST);
>
> @@ -1818,7 +1818,7 @@ static void xelpdp_aux_power_well_disable(struct drm_i915_private *dev_priv,
> {
> enum aux_ch aux_ch = i915_power_well_instance(power_well)->xelpdp.aux_ch;
>
> - intel_de_rmw(dev_priv, XELPDP_DP_AUX_CH_CTL(aux_ch),
> + intel_de_rmw(dev_priv, XELPDP_DP_AUX_CH_CTL(dev_priv, aux_ch),
> XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,
> 0);
> usleep_range(10, 30);
> @@ -1829,7 +1829,7 @@ static bool xelpdp_aux_power_well_enabled(struct drm_i915_private *dev_priv,
> {
> enum aux_ch aux_ch = i915_power_well_instance(power_well)->xelpdp.aux_ch;
>
> - return intel_de_read(dev_priv, XELPDP_DP_AUX_CH_CTL(aux_ch)) &
> + return intel_de_read(dev_priv, XELPDP_DP_AUX_CH_CTL(dev_priv, aux_ch)) &
> XELPDP_DP_AUX_CH_CTL_POWER_STATUS;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 2d173bd495a3..b90cad7f567b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -687,10 +687,10 @@ static i915_reg_t xelpdp_aux_ctl_reg(struct intel_dp *intel_dp)
> case AUX_CH_USBC2:
> case AUX_CH_USBC3:
> case AUX_CH_USBC4:
> - return XELPDP_DP_AUX_CH_CTL(aux_ch);
> + return XELPDP_DP_AUX_CH_CTL(dev_priv, aux_ch);
> default:
> MISSING_CASE(aux_ch);
> - return XELPDP_DP_AUX_CH_CTL(AUX_CH_A);
> + return XELPDP_DP_AUX_CH_CTL(dev_priv, AUX_CH_A);
> }
> }
>
> @@ -707,10 +707,10 @@ static i915_reg_t xelpdp_aux_data_reg(struct intel_dp *intel_dp, int index)
> case AUX_CH_USBC2:
> case AUX_CH_USBC3:
> case AUX_CH_USBC4:
> - return XELPDP_DP_AUX_CH_DATA(aux_ch, index);
> + return XELPDP_DP_AUX_CH_DATA(dev_priv, aux_ch, index);
> default:
> MISSING_CASE(aux_ch);
> - return XELPDP_DP_AUX_CH_DATA(AUX_CH_A, index);
> + return XELPDP_DP_AUX_CH_DATA(dev_priv, AUX_CH_A, index);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_regs.h b/drivers/gpu/drm/i915/display/intel_dp_aux_regs.h
> index 1e9e018a2a48..b4e96baae25a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_regs.h
> @@ -14,6 +14,13 @@
> * registers
> */
>
> +/*
> + * Wrapper macro to convert from aux_ch to the index used in some of the
> + * registers, similarly to __xe2lpd_port_idx().
> + */
> +#define __xe2lpd_aux_ch_idx(aux_ch) \
> + (aux_ch >= AUX_CH_USBC1 ? aux_ch : AUX_CH_USBC4 + 1 + aux_ch - AUX_CH_A)
> +
> /* TODO: Remove implicit dev_priv */
> #define _DPA_AUX_CH_CTL (DISPLAY_MMIO_BASE(dev_priv) + 0x64010)
> #define _DPB_AUX_CH_CTL (DISPLAY_MMIO_BASE(dev_priv) + 0x64110)
> @@ -21,11 +28,15 @@
> #define _XELPDP_USBC2_AUX_CH_CTL 0x16f410
> #define DP_AUX_CH_CTL(aux_ch) _MMIO_PORT(aux_ch, _DPA_AUX_CH_CTL, \
> _DPB_AUX_CH_CTL)
> -#define XELPDP_DP_AUX_CH_CTL(aux_ch) \
> +#define _XELPDP_DP_AUX_CH_CTL(aux_ch) \
> _MMIO(_PICK_EVEN_2RANGES(aux_ch, AUX_CH_USBC1, \
> _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL, \
> _XELPDP_USBC1_AUX_CH_CTL, \
> _XELPDP_USBC2_AUX_CH_CTL))
> +#define XELPDP_DP_AUX_CH_CTL(i915__, aux_ch) \
> + (DISPLAY_VER(i915__) >= 20 ? \
> + _XELPDP_DP_AUX_CH_CTL(__xe2lpd_aux_ch_idx(aux_ch)) : \
> + _XELPDP_DP_AUX_CH_CTL(aux_ch))
> #define DP_AUX_CH_CTL_SEND_BUSY REG_BIT(31)
> #define DP_AUX_CH_CTL_DONE REG_BIT(30)
> #define DP_AUX_CH_CTL_INTERRUPT REG_BIT(29)
> @@ -65,10 +76,14 @@
> #define _XELPDP_USBC2_AUX_CH_DATA1 0x16f414
> #define DP_AUX_CH_DATA(aux_ch, i) _MMIO(_PORT(aux_ch, _DPA_AUX_CH_DATA1, \
> _DPB_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
> -#define XELPDP_DP_AUX_CH_DATA(aux_ch, i) \
> +#define _XELPDP_DP_AUX_CH_DATA(aux_ch, i) \
> _MMIO(_PICK_EVEN_2RANGES(aux_ch, AUX_CH_USBC1, \
> _DPA_AUX_CH_DATA1, _DPB_AUX_CH_DATA1, \
> _XELPDP_USBC1_AUX_CH_DATA1, \
> _XELPDP_USBC2_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
> +#define XELPDP_DP_AUX_CH_DATA(i915__, aux_ch, i) \
> + (DISPLAY_VER(i915__) >= 20 ? \
> + _XELPDP_DP_AUX_CH_DATA(__xe2lpd_aux_ch_idx(aux_ch), i) : \
> + _XELPDP_DP_AUX_CH_DATA(aux_ch, i))
>
> #endif /* __INTEL_DP_AUX_REGS_H__ */
> --
> 2.40.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
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