[Intel-xe] [PATCH v4 19/30] drm/i915/xe2lpd: Enable odd size and panning for planar yuv
Lucas De Marchi
lucas.demarchi at intel.com
Fri Sep 15 17:46:40 UTC 2023
From: Juha-Pekka Heikkilä <juha-pekka.heikkila at intel.com>
Enable odd size and panning for planar yuv formats.
Cc: Suraj Kandpal <suraj.kandpal at intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila at intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal at intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index d7a0bd686e49..b1074350616c 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -981,6 +981,14 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
if (fb->format->format == DRM_FORMAT_RGB565 && rotated) {
hsub = 2;
vsub = 2;
+ } else if (DISPLAY_VER(i915) >= 20 &&
+ intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) {
+ /*
+ * This allows NV12 and P0xx formats to have odd size and/or odd
+ * source coordinates on DISPLAY_VER(i915) >= 20
+ */
+ hsub = 1;
+ vsub = 1;
} else {
hsub = fb->format->hsub;
vsub = fb->format->vsub;
--
2.40.1
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