[Intel-xe] [PATCH] drm/xe: Add Wa_18028616096

[Matt Roper]

On Mon, Sep 25, 2023 at 11:01:25AM -0700, Matt Roper wrote:
> On Mon, Sep 25, 2023 at 09:35:43PM +0530, Shekhar Chauhan wrote:
> > Drop UGM per set fragment threshold to 3
> > 
> > BSpec: 54833
> > Signed-off-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
> 
> Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

...and pushed to drm-xe-next.  Thanks for the patch.


Matt

> 
> > ---
> >  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  1 +
> >  drivers/gpu/drm/xe/xe_wa.c           | 10 ++++++++++
> >  2 files changed, 11 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> > index e13fbbdf6929..3a4c9bcf793f 100644
> > --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> > +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> > @@ -347,6 +347,7 @@
> >  #define   FORCE_1_SUB_MESSAGE_PER_FRAGMENT	REG_BIT(15)
> >  
> >  #define LSC_CHICKEN_BIT_0_UDW			XE_REG_MCR(0xe7c8 + 4)
> > +#define   UGM_FRAGMENT_THRESHOLD_TO_3		REG_BIT(58 - 32)
> >  #define   DIS_CHAIN_2XSIMD8			REG_BIT(55 - 32)
> >  #define   FORCE_SLM_FENCE_SCOPE_TO_TILE		REG_BIT(42 - 32)
> >  #define   FORCE_UGM_FENCE_SCOPE_TO_TILE		REG_BIT(41 - 32)
> > diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> > index d84e67a9af07..1450af6cab34 100644
> > --- a/drivers/gpu/drm/xe/xe_wa.c
> > +++ b/drivers/gpu/drm/xe/xe_wa.c
> > @@ -374,6 +374,16 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> >  	  XE_RTP_ACTIONS(SET(FF_SLICE_CS_CHICKEN2,
> >  			     PERF_FIX_BALANCING_CFE_DISABLE))
> >  	},
> > +	{ XE_RTP_NAME("18028616096"),
> > +	  XE_RTP_RULES(SUBPLATFORM(DG2, G10),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, UGM_FRAGMENT_THRESHOLD_TO_3))
> > +	},
> > +	{ XE_RTP_NAME("18028616096"),
> > +	  XE_RTP_RULES(SUBPLATFORM(DG2, G12),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, UGM_FRAGMENT_THRESHOLD_TO_3))
> > +	},
> >  	{ XE_RTP_NAME("16011620976, 22015475538"),
> >  	  XE_RTP_RULES(PLATFORM(DG2),
> >  		       FUNC(xe_rtp_match_first_render_or_compute)),
> > -- 
> > 2.34.1
> > 
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation