[Intel-xe] [PATCH v2 4/6] drm/xe: add MMIO extension support flags
Koby Elbaz
kelbaz at habana.ai
Tue Sep 26 10:38:46 UTC 2023
Besides the regular MMIO space that exists by default, MMIO
extension support & MMIO extension tile size should both be
defined per device, and updated from the device's descriptor.
Signed-off-by: Koby Elbaz <kelbaz at habana.ai>
Reviewed-by: Ofir Bitton <obitton at habana.ai>
Reviewed-by: Moti Haimovski <mhaimovski at habana.ai>
---
drivers/gpu/drm/xe/xe_device_types.h | 4 ++++
drivers/gpu/drm/xe/xe_pci.c | 3 +++
drivers/gpu/drm/xe/xe_pci_types.h | 2 ++
3 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 3e2c68248334..7d459346b8a1 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -204,6 +204,8 @@ struct xe_device {
const char *graphics_name;
/** @media_name: media IP name */
const char *media_name;
+ /** @tile_mmio_ext_size: size of MMIO extension space, per-tile */
+ u32 tile_mmio_ext_size;
/** @graphics_verx100: graphics IP version */
u32 graphics_verx100;
/** @media_verx100: media IP version */
@@ -253,6 +255,8 @@ struct xe_device {
u8 enable_display:1;
/** @bypass_mtcfg: Bypass Multi-Tile configuration from MTCFG register */
u8 bypass_mtcfg:1;
+ /** @supports_mmio_ext: supports MMIO extension/s */
+ u8 supports_mmio_ext:1;
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
const struct intel_display_device_info *display;
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 5ae7e3b75697..accce1e9785d 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -60,6 +60,7 @@ struct xe_device_desc {
u8 has_llc:1;
u8 bypass_mtcfg:1;
+ u8 supports_mmio_ext:1;
};
__diag_push();
@@ -567,6 +568,8 @@ static int xe_info_init(struct xe_device *xe,
xe->info.media_name = media_desc ? media_desc->name : "none";
xe->info.has_llc = desc->has_llc;
xe->info.bypass_mtcfg = desc->bypass_mtcfg;
+ xe->info.supports_mmio_ext = desc->supports_mmio_ext;
+ xe->info.tile_mmio_ext_size = graphics_desc->tile_mmio_ext_size;
xe->info.dma_mask_size = graphics_desc->dma_mask_size;
xe->info.vram_flags = graphics_desc->vram_flags;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index df6ddbc52d7f..d784e6057249 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -20,6 +20,8 @@ struct xe_graphics_desc {
u64 hw_engine_mask; /* hardware engines provided by graphics IP */
+ u32 tile_mmio_ext_size; /* size of MMIO extension space, per-tile */
+
u8 max_remote_tiles:2;
u8 has_asid:1;
--
2.34.1
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